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Some syntax fix
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6eeeb11b8e
commit
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3 changed files with 17 additions and 11 deletions
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@ -165,7 +165,7 @@ module riscv_controller
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output logic load_stall_o,
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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output logic branch_stall_o,
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output logic branch_calc_jump_target_o,
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`endif
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input logic id_ready_i, // ID stage is ready
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@ -258,7 +258,7 @@ module riscv_controller
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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branch_stall_o = 1'b0;
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branch_calc_jump_target_o = 1'b0;
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`endif
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@ -680,8 +680,7 @@ module riscv_controller
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WAIT_BRANCH_EX:
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begin
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// there is a branch in the EX stage that is taken
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branch_stall_o = 1'b1;
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is_decoding_o = 1'b1;
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branch_calc_jump_target_o = 1'b1;
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halt_if_o = 1'b1;
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if (id_ready_i)
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begin
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@ -893,7 +892,14 @@ module riscv_controller
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jr_stall_o = 1'b1;
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deassert_we_o = 1'b1;
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end
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`endif // MERGE_ID_EX
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`else
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if ((jump_in_dec_i == BRANCH_JALR) &&
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((regfile_we_wb_i == 1'b1) && (reg_d_wb_is_reg_a_i == 1'b1))
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begin
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jr_stall_o = 1'b1;
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deassert_we_o = 1'b1;
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end
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`endif
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`endif // THREE_PORT_REG_FILE
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end
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@ -290,7 +290,7 @@ module riscv_decoder
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OPCODE_JAL: begin // Jump and Link
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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jump_in_id = BRANCH_JAL;
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jump_in_id = BRANCH_JAL;
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// Calculate jump target in EX
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alu_op_a_mux_sel_o = OP_A_CURRPC;
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alu_op_b_mux_sel_o = OP_B_IMM;
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@ -321,7 +321,7 @@ module riscv_decoder
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OPCODE_JALR: begin // Jump and Link Register
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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jump_in_id = BRANCH_JALR;
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jump_in_id = BRANCH_JALR;
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// Calculate jump target in EX
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alu_op_a_mux_sel_o = OP_A_CURRPC;
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alu_op_b_mux_sel_o = OP_B_REGA_OR_FWD;
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@ -311,7 +311,7 @@ module riscv_id_stage
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`endif
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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logic branch_stall;
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logic branch_calc_jump_target;
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`endif
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logic jr_stall;
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logic load_stall;
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@ -945,7 +945,7 @@ module riscv_id_stage
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OP_C_REGB_OR_FWD: alu_operand_c = operand_b_fw_id;
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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OP_C_JT: alu_operand_c = pc_if_i; // this is the return address
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OP_C_RA: alu_operand_c = pc_if_i; // this is the return address
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`else
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OP_C_JT: alu_operand_c = jump_target;
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`endif
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@ -1109,7 +1109,7 @@ module riscv_id_stage
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`endif // ONLY_ALIGNED
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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.branch_stall_i ( branch_stall ),
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.branch_calc_jump_target_i ( branch_calc_jump_target ),
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`endif
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// CONFIG_REGION: MUL_SUPPORT
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`ifdef MUL_SUPPORT
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@ -1353,7 +1353,7 @@ module riscv_id_stage
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`endif // ONLY_ALIGNED
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// CONFIG_REGION: NO_JUMP_ADDER
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`ifdef NO_JUMP_ADDER
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.branch_stall_o ( branch_stall ),
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.branch_calc_jump_target_o ( branch_calc_jump_target ),
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`endif
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.jr_stall_o ( jr_stall ),
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.load_stall_o ( load_stall ),
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