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some fixes

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This commit is contained in:
Pepijn de Vos 2025-03-11 17:55:23 +01:00
parent 1761a0c226
commit 2eab42f7fe
1 changed files with 1 additions and 1 deletions
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rtl/system_integration/neorv32_litex_core_complex.vhd
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@ -118,7 +118,7 @@ begin
generic map (
-- General --
CLOCK_FREQUENCY => 0, -- clock frequency of clk_i in Hz [not required by the core complex]
HART_BASE => HART_ID,
HART_BASE => HART_ID,
-- On-Chip Debugger (OCD) --
OCD_EN => DEBUG, -- implement on-chip debugger
-- RISC-V CPU Extensions --