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[sim] update testbench generics

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stnolting 2024-09-30 22:59:44 +02:00
parent 39430d867f
commit 68314864ba
2 changed files with 6 additions and 2 deletions
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4
sim/neorv32_tb.vhd
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@ -201,14 +201,16 @@ begin
ON_CHIP_DEBUGGER_EN => true, -- implement on-chip debugger
-- RISC-V CPU Extensions --
RISCV_ISA_A => true, -- implement atomic memory operations extension?
RISCV_ISA_B => true, -- implement bit-manipulation extension?
RISCV_ISA_C => true, -- implement compressed extension?
RISCV_ISA_E => false, -- implement embedded RF extension?
RISCV_ISA_M => true, -- implement mul/div extension?
RISCV_ISA_U => true, -- implement user mode extension?
RISCV_ISA_Zba => true, -- implement shifted-add bit-manipulation extension
RISCV_ISA_Zbb => true, -- implement basic bit-manipulation extension
RISCV_ISA_Zbkb => true, -- implement bit-manipulation instructions for cryptography
RISCV_ISA_Zbkc => true, -- implement carry-less multiplication instructions?
RISCV_ISA_Zbkx => true, -- implement cryptography crossbar permutation extension?
RISCV_ISA_Zbs => true, -- implement single-bit bit-manipulation extension
RISCV_ISA_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
RISCV_ISA_Zicntr => true, -- implement base counters?
RISCV_ISA_Zicond => true, -- implement integer conditional operations?

4
sim/simple/neorv32_tb.simple.vhd
View file

@ -173,14 +173,16 @@ begin
ON_CHIP_DEBUGGER_EN => true, -- implement on-chip debugger
-- RISC-V CPU Extensions --
RISCV_ISA_A => true, -- implement atomic memory operations extension?
RISCV_ISA_B => true, -- implement bit-manipulation extension?
RISCV_ISA_C => false, -- implement compressed extension?
RISCV_ISA_E => false, -- implement embedded RF extension?
RISCV_ISA_M => true, -- implement mul/div extension?
RISCV_ISA_U => true, -- implement user mode extension?
RISCV_ISA_Zba => true, -- implement shifted-add bit-manipulation extension
RISCV_ISA_Zbb => true, -- implement basic bit-manipulation extension
RISCV_ISA_Zbkb => true, -- implement bit-manipulation instructions for cryptography
RISCV_ISA_Zbkc => true, -- implement carry-less multiplication instructions?
RISCV_ISA_Zbkx => true, -- implement cryptography crossbar permutation extension?
RISCV_ISA_Zbs => true, -- implement single-bit bit-manipulation extension
RISCV_ISA_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
RISCV_ISA_Zicntr => true, -- implement base counters?
RISCV_ISA_Zicond => true, -- implement integer conditional operations?