minor edits and updates

due to moved riscv architecture test folder(s)
This commit is contained in:
stnolting 2021-07-12 17:07:32 +02:00
parent aa769fa210
commit fd51fe7b08
6 changed files with 17 additions and 17 deletions

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@ -969,8 +969,9 @@ The NEORV32 Processor passes the according tests provided by the official RISC-V
(V2.0+), which is available online at GitHub: https://github.com/riscv/riscv-arch-test
All files required for executing the test framework on a simulated instance of the processor (including port
files) are located in the `riscv-arch-test` folder in the root directory of the NEORV32 repository. Take a
look at the provided `riscv-arch-test/README.md` (https://github.com/stnolting/neorv32/blob/master/riscv-arch-test/README.md[online at GitHub])
files) are located in the `sw/isa-test` folder of the NEORV32 repository. The test framework is executed via the
`sim/run_riscv_arch_test.sh` script. Take a look at the provided `sim/README.md`
(https://github.com/stnolting/neorv32/tree/master/sim[online at GitHub])
file for more information on how to run the tests and how testing is conducted in detail.