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Author SHA1 Message Date
Olof Kindgren
d4102f927f Synthesis fixes 2018-11-17 22:14:44 +01:00
Olof Kindgren
0362192769 Use internal reset 2018-11-17 22:06:10 +01:00
Olof Kindgren
f66f82a57a Add explicit wire defs to ports 2018-11-17 21:30:03 +01:00
Olof Kindgren
0036756157 Pass compliance tests 2018-11-15 14:16:01 +01:00
Olof Kindgren
34fc93ba09 Fix misaligned jumps 2018-11-15 12:50:40 +01:00
Olof Kindgren
f12f8ecf61 Remove MEM_WAIT state 2018-11-15 09:59:25 +01:00
Olof Kindgren
91cff7fdfc Merge COMPARE and SH_INIT states 2018-11-15 09:02:18 +01:00
Olof Kindgren
aa0e3aa77e Handle misaligned jal 2018-11-15 08:49:29 +01:00
Olof Kindgren
a92c933af1 csr, verilator, traps 2018-11-14 12:16:20 +01:00
Olof Kindgren
c33d97d80f Update firmware 2018-11-09 21:28:40 +01:00
Olof Kindgren
3c98d35766 Change to wb interface 2018-11-09 21:26:13 +01:00
Olof Kindgren
cbbdaed112 slli, srli, add, sll, sltiu, slt, xor, srl, sra, or, and 2018-11-02 13:48:08 +01:00
Olof Kindgren
8409aa4c4b lh, lw, lbu, lhu, sb, sh, slti 2018-11-01 22:51:51 +01:00
Olof Kindgren
c90920d9b2 bge, bltu, bgeu 2018-11-01 09:35:49 +01:00
Olof Kindgren
d4bbe17e78 jalr, blt 2018-10-31 14:51:28 +01:00
Olof Kindgren
d4b2697761 auipc, sub 2018-10-30 23:33:28 +01:00
Olof Kindgren
96b1906676 bne, srai 2018-10-30 22:41:05 +01:00
Olof Kindgren
66000a77f5 beq, sw 2018-10-28 23:54:04 +01:00
Olof Kindgren
c2030a95fd jal, addi, lui, lb 2018-10-26 22:52:39 +02:00
Olof Kindgren
e10c41be8d Initial commit 2018-10-23 23:45:41 +02:00