16 commits

Author	SHA1	Message	Date
tinebp	704f525fd6	memory mem_coalescer miss perf counter ... RTL perf counters refactoring	2024-12-26 08:00:36 -08:00
Blaise Tine	b634f9f47d	count_leading_zeros fix	2024-09-28 20:15:03 -07:00
Blaise Tine	a9a5ded030	bitmanip logceil fix	2024-09-23 23:54:43 -07:00
Blaise Tine	a80be895ba	fixed compiler errors	2024-09-23 03:05:46 -07:00
Blaise Tine	b8199decf4	opaesim and xrtsim multi-bank memory support	2024-09-22 03:54:40 -07:00
Blaise Tine	d47cccc157	Vortex 2.0 changes: ... + Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes	2023-10-19 20:51:22 -07:00
Blaise Tine	1bd25acb0b	cmov	2022-02-05 17:58:12 -05:00
Blaise Tine	5fbace9fa0	fixed several bugs and refactor memory access	2022-02-04 17:50:19 -05:00
Santosh Srivatsan	836c777680	XLEN parameterization for simx	2022-02-03 15:19:31 -05:00
Santosh Srivatsan	3eb2b71955	removed traces of xlen. Overloaded sext	2022-02-01 13:54:51 -05:00
Santosh Srivatsan	7aa93a735d	Added FLEN parameterization for RV32/64 F and D instructions	2022-01-24 15:42:15 -05:00
Santosh Srivatsan	91c22a2592	Fixed some riscv-tests	2022-01-22 12:54:10 -05:00
Santosh Srivatsan	f93303bac7	Minor update	2021-12-15 17:21:38 -05:00
Santosh Srivatsan	885bb58ca9	Merged RV64IMFD extensions to master branch	2021-12-11 17:06:29 -05:00
Santosh Srivatsan	3324b32a29	Moved Dockerfile to miscs	2021-12-10 21:54:41 -05:00
Blaise Tine	18762dffce	fixes: texture unit mem access sometimes going to smem, bilinear texture filtering; new: cache req_id,	2021-11-24 00:00:17 -05:00