8 commits

Author	SHA1	Message	Date
wgulian3	10ebfd7e24	Add threaded -O3 build mode	2020-03-21 17:23:40 -04:00
felsabbagh3	a86a403ca9	New Cache Design Passing All Tests	2020-03-04 23:24:32 -08:00
felsabbagh3	f98f5c414d	+Added icache stage -- 3rd case of AUIPC os broken?	2020-03-01 18:01:02 -08:00
wgulian3	4184980188	verilator: run all riscv tests	2020-02-13 13:50:57 -05:00
wgulian3	e662ef4134	Fix verilator	2020-02-13 13:42:43 -05:00
felsabbagh3	01efe02e8b	CACHE WORKING just needs lb/sb	2019-10-25 03:03:09 -04:00
felsabbagh3	1e648c5819	FIxed first circular issue	2019-10-24 10:38:04 -04:00
felsabbagh3	6b729fd2ea	minor	2019-10-18 01:46:38 -04:00

Renamed from rtl/test_bench.cpp (Browse further)