vortex

mirror of https://github.com/vortexgpgpu/vortex.git synced 2025-04-22 04:47:56 -04:00

History

tinebp bffc6d9610 Some checks are pending CI / setup (push) Waiting to run Details CI / build (32) (push) Blocked by required conditions Details CI / build (64) (push) Blocked by required conditions Details CI / tests (cache, 32) (push) Blocked by required conditions Details CI / tests (cache, 64) (push) Blocked by required conditions Details CI / tests (config1, 32) (push) Blocked by required conditions Details CI / tests (config1, 64) (push) Blocked by required conditions Details CI / tests (config2, 32) (push) Blocked by required conditions Details CI / tests (config2, 64) (push) Blocked by required conditions Details CI / tests (debug, 32) (push) Blocked by required conditions Details CI / tests (debug, 64) (push) Blocked by required conditions Details CI / tests (opencl, 32) (push) Blocked by required conditions Details CI / tests (opencl, 64) (push) Blocked by required conditions Details CI / tests (regression, 32) (push) Blocked by required conditions Details CI / tests (regression, 64) (push) Blocked by required conditions Details CI / tests (scope, 32) (push) Blocked by required conditions Details CI / tests (scope, 64) (push) Blocked by required conditions Details CI / tests (stress, 32) (push) Blocked by required conditions Details CI / tests (stress, 64) (push) Blocked by required conditions Details CI / tests (synthesis, 32) (push) Blocked by required conditions Details CI / tests (synthesis, 64) (push) Blocked by required conditions Details CI / complete (push) Blocked by required conditions Details enabling Vivado's asynchronous bram suppot via direct netlist transformation		2024-11-13 16:20:25 -08:00
..
altera_ip_gen.sh	xilinx synthesis debugging foxes	2024-09-17 06:22:07 -07:00
bin2coe.py	adding test coverage for xilinx synthesis	2024-08-22 02:51:17 -07:00
gen_config.py	Vortex 2.0 changes:	2023-11-10 02:47:05 -08:00
gen_sources.sh	minor update	2024-08-17 05:32:21 -07:00
ila_insert.tcl	xilinx synthesis debugging foxes	2024-09-17 06:22:07 -07:00
parse_vcs_list.tcl	Vortex 2.0 changes:	2023-11-10 02:47:05 -08:00
repl_params.py	adding support for top-module parameter replacement during synthesis tests	2024-02-10 21:54:35 -08:00
scope.py	axi_adapter large tags support	2024-09-30 06:25:50 -07:00
sv2v.sh	mino rupdate	2024-04-15 19:23:20 -07:00
xilinx_async_bram_patch.tcl	enabling Vivado's asynchronous bram suppot via direct netlist transformation	2024-11-13 16:20:25 -08:00
xilinx_export_netlist.tcl	enabling Vivado's asynchronous bram suppot via direct netlist transformation	2024-11-13 16:20:25 -08:00
xilinx_ip_gen.tcl	xilinx synthesis debugging foxes	2024-09-17 06:22:07 -07:00