| .. |
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VX_bypass_buffer.v
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reset networks optimization
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2020-11-16 01:12:02 -08:00 |
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VX_divider.v
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multiplier unit optimization - using fifo for metadata, shift register optimization
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2020-12-26 11:23:21 -08:00 |
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VX_dp_ram.v
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-03-04 20:51:03 -08:00 |
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VX_elastic_buffer.v
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minor updates
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2021-01-17 13:58:43 -08:00 |
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VX_fair_arbiter.v
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adding input buffering to bus arbiters to reduce backpressure delay propagation
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2020-12-05 17:31:29 -08:00 |
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VX_fifo_queue.v
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minor update
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2021-02-27 02:31:05 -08:00 |
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VX_fixed_arbiter.v
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-03-04 20:51:03 -08:00 |
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VX_index_buffer.v
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adding empty to index_buffer
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2021-03-30 10:15:42 -07:00 |
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VX_index_queue.v
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reset networks optimization
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2020-11-16 01:12:02 -08:00 |
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VX_lzc.v
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minor update
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2021-01-10 22:03:23 -08:00 |
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VX_matrix_arbiter.v
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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VX_multiplier.v
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RAM blocks inference fixes
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2020-11-30 14:02:47 -08:00 |
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VX_onehot_encoder.v
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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VX_pending_size.v
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minor updates
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2021-01-12 11:24:36 -08:00 |
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VX_pipe_register.v
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fixed pipe register reset issue in synthesis
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2021-01-01 14:54:18 -08:00 |
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VX_priority_encoder.v
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minor optimization
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2021-02-18 16:03:16 -08:00 |
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VX_reset_relay.v
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updating fdiv/fsqrt bram hex files, reset_delay updaet
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2021-02-04 09:02:18 -08:00 |
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VX_rr_arbiter.v
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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VX_scan.v
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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VX_scope.v
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minor ibuffer critical path optimization.
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2021-04-19 20:53:13 -07:00 |
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VX_serial_div.v
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reset networks optimization
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2020-11-16 01:12:02 -08:00 |
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VX_shift_register.v
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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VX_skid_buffer.v
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minor update
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2021-03-29 23:51:05 -07:00 |
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VX_sp_ram.v
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-03-04 20:51:03 -08:00 |
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VX_stream_arbiter.v
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using shiftreg-based skid buffers
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2021-02-28 02:20:09 -08:00 |
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VX_stream_demux.v
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using shiftreg-based skid buffers
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2021-02-28 02:20:09 -08:00 |
