vortex

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History

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..
altera_ip_gen.sh	xilinx synthesis debugging foxes	2024-09-17 06:22:07 -07:00
bin2coe.py	adding test coverage for xilinx synthesis	2024-08-22 02:51:17 -07:00
gen_config.py	Vortex 2.0 changes:	2023-11-10 02:47:05 -08:00
gen_sources.sh	minor update	2024-08-17 05:32:21 -07:00
ila_insert.tcl	xilinx synthesis debugging foxes	2024-09-17 06:22:07 -07:00
parse_vcs_list.tcl	Vortex 2.0 changes:	2023-11-10 02:47:05 -08:00
repl_params.py	adding support for top-module parameter replacement during synthesis tests	2024-02-10 21:54:35 -08:00
scope.py	axi_adapter large tags support	2024-09-30 06:25:50 -07:00
sv2v.sh	mino rupdate	2024-04-15 19:23:20 -07:00
xilinx_async_bram_patch.tcl	rtlsim multibanks	2024-12-16 22:10:57 -08:00
xilinx_export_netlist.tcl	xilinx asynchronous bram patch fixes	2024-11-19 01:57:33 -08:00
xilinx_ip_gen.tcl	xilinx synthesis debugging foxes	2024-09-17 06:22:07 -07:00