.. |
intel
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package import refactor
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2022-01-18 11:29:35 -08:00 |
lutrams
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typo fixed
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2022-01-18 11:29:35 -08:00 |
xilinx
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package import refactor
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2022-01-18 11:29:35 -08:00 |
addr_hash.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
alu_unit.sv
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minor const alu changes
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2022-01-18 11:29:35 -08:00 |
amo_alu.sv
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resolved enum conflicts
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2022-01-18 11:29:35 -08:00 |
avalon_master.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
axi_master.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
axi_to_arb.sv
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resolved enum conflicts
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2022-01-18 11:29:35 -08:00 |
barrel_shifter.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
binary_occupancy.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
branch_comparator.sv
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decode and branch cleanup
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2022-01-18 11:29:35 -08:00 |
branch_predictor.sv
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linting fix
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2022-01-18 11:29:35 -08:00 |
branch_predictor_ram.sv
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switch to simple-dual-port ram
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2022-01-18 11:29:35 -08:00 |
branch_unit.sv
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first stage of exception redesign
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2022-01-18 11:29:35 -08:00 |
byte_en_BRAM.sv
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updated vendor selection config
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2022-01-18 11:29:35 -08:00 |
clz.sv
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Div improvements
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2022-01-18 11:29:35 -08:00 |
csr_types.sv
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CSR input cleanup
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2022-01-18 11:29:35 -08:00 |
csr_unit.sv
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exception updates
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2022-01-18 11:29:35 -08:00 |
cycler.sv
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code cleanup
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2018-06-11 15:24:22 -07:00 |
dbram.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
dcache.sv
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linting fix
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2022-01-18 11:29:35 -08:00 |
ddata_bank.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
decode_and_issue.sv
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div reuse addr fix
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2022-02-10 11:17:01 -08:00 |
div_core.sv
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div control signal cleanups
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2022-01-18 11:29:35 -08:00 |
div_unit.sv
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global control signals restructuring
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2022-01-18 11:29:35 -08:00 |
dtag_banks.sv
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re-parameterization
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2022-01-18 11:29:35 -08:00 |
external_interfaces.sv
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l1 arbiter clean up
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2022-01-18 11:29:35 -08:00 |
fetch.sv
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exception updates
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2022-01-18 11:29:35 -08:00 |
gc_unit.sv
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machine mode parameter changes
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2022-02-10 11:17:01 -08:00 |
ibram.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
icache.sv
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re-parameterization
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2022-01-18 11:29:35 -08:00 |
illegal_instruction_checker.sv
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Made ifence optional
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2022-02-10 11:17:01 -08:00 |
instruction_metadata_and_id_management.sv
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exception updates
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2022-01-18 11:29:35 -08:00 |
interfaces.sv
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interface linter change
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2022-02-10 11:17:01 -08:00 |
itag_banks.sv
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re-parameterization
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2022-01-18 11:29:35 -08:00 |
l1_arbiter.sv
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re-parameterization
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2022-01-18 11:29:35 -08:00 |
lfsr.sv
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added reset param to lfsr
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2022-01-18 11:29:35 -08:00 |
load_queue.sv
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lsq interface split
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2022-01-18 11:29:35 -08:00 |
load_store_queue.sv
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L/S exception rework
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2022-01-18 11:29:35 -08:00 |
load_store_unit.sv
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L/S exception rework
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2022-01-18 11:29:35 -08:00 |
mmu.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
mul_unit.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
one_hot_occupancy.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
one_hot_to_integer.sv
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linting fix
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2022-01-18 11:29:35 -08:00 |
placer_randomizer.sv
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helper for placement randomization
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2019-01-03 12:39:09 -08:00 |
priority_encoder.sv
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tool compatability changes
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2022-01-18 11:29:35 -08:00 |
ras.sv
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global control signals restructuring
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2022-01-18 11:29:35 -08:00 |
reg_inuse.sv
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code cleanups
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2020-01-22 19:59:33 -08:00 |
register_bank.sv
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Intel inferrence changes
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2022-01-18 11:29:35 -08:00 |
register_file.sv
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L/S exception rework
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2022-01-18 11:29:35 -08:00 |
register_free_list.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
renamer.sv
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renamer clean up
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2022-02-10 11:17:01 -08:00 |
riscv_types.sv
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interrupt rewire
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2022-01-18 11:29:35 -08:00 |
set_clr_reg_with_rst.sv
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code cleanup: converted set/clr register usage into a module
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2020-04-02 15:32:02 -07:00 |
shift_counter.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
store_queue.sv
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L/S exception rework
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2022-01-18 11:29:35 -08:00 |
tag_bank.sv
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minor cleanups
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2020-06-30 11:06:07 -07:00 |
taiga.sv
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renamer clean up
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2022-02-10 11:17:01 -08:00 |
taiga_config.sv
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Made ifence optional
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2022-02-10 11:17:01 -08:00 |
taiga_fifo.sv
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added reset param to lfsr
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2022-01-18 11:29:35 -08:00 |
taiga_types.sv
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L/S exception rework
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2022-01-18 11:29:35 -08:00 |
tlb_lut_ram.sv
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global control signals restructuring
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2022-01-18 11:29:35 -08:00 |
toggle_memory.sv
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switched toggle-mem to new lutram blocks
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2022-01-18 11:29:35 -08:00 |
toggle_memory_set.sv
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added reset param to lfsr
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2022-01-18 11:29:35 -08:00 |
wishbone_master.sv
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package import refactor
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2022-01-18 11:29:35 -08:00 |
writeback.sv
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re-parameterization
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2022-01-18 11:29:35 -08:00 |