Côme
3b90bcf4aa
Update CI readme after merging cva6 and core-v-verif ( #1390 )
2023-09-13 16:15:41 +02:00
JeanRochCoulon
d6bb5deabf
HOT FIX, update expected_synth.yml
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Previous merge has reduced the gate count, this commit fixes it.
2023-09-12 23:26:59 +02:00
Fatima Saleem
2921f877ed
updated the gates count for embedded config
2023-09-07 21:44:40 +05:00
Côme Allart
10ea8240d2
fix CI
2023-09-07 11:38:34 +02:00
Côme Allart
aa03f6a307
add pipeline rules from cva6's previous CI
2023-09-07 11:38:34 +02:00
Côme Allart
eb0af8975f
move ci from cvv
2023-09-07 11:38:34 +02:00
Côme Allart
efc01b47e4
remove old ci
2023-09-07 11:38:34 +02:00
Cesar Fuguet
85b38984d4
gitlab-ci: update the number of gates for the cv32a6_embedded ASIC check
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Signed-off-by: Cesar Fuguet <cesar.fuguettortolero@cea.fr>
2023-09-01 13:59:38 +02:00
Côme
fa59fff204
update expected gate count ( #1336 )
2023-08-16 12:06:44 +02:00
Mohamed Aziz Frikha
1238079552
Add MSTATUSH register for RV32 ( fix #1160 ) ( #1328 )
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Co-authored-by: Frikha Mohamed Aziz <mohamed-aziz.frikha@thalesgroup.com>
2023-08-13 23:20:07 +02:00
Côme
edafd8e01d
test: update expected synth result ( #1304 )
2023-07-18 11:07:37 +02:00
Côme
6c09d11b53
ci: add area expected results into cva6 repository ( #1294 )
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previously the area expectations were logged in core-v-verif. This PR makes possible to perform area expectation changes without having to open a second MR on core-v-verif.
2023-07-04 11:30:36 +02:00
JeanRochCoulon
31948853c6
Replace WT_DCACHE define by CVA6ConfigCacheType localparam ( #1127 )
2023-03-21 14:18:18 +01:00
Yannick Casamatta
062ec9170a
Update Gitlab CI: new workflow, new jobs, code optimization ( #832 )
2022-03-04 08:11:35 +01:00
Yannick Casamatta
9fda864835
ci: Add flow for gitlab-ci ( #805 )
2022-01-27 11:42:10 +01:00