* Introduction This PR adds support for Zbkx, Zkne, Zknd and Zknh extensions in the CVA6 core. It also adds the documentation and tests for these extensions. These changes have been tested with self-written single instruction tests and with the riscv-arch-tests. This PR will complete the Zkn - NIST Algorithm Suite extension. * Implementation Zbkx Extension: Added support for the Zbkx instruction set. It essentially expands the Bitmanip extension with additional instructions useful in cryptography. These instructions are xperm8, xperm4. Zkne Extension: Added support for the Zkne instruction set. It essentially adds AES encryption support for scalar cryptography. These instructions are aes32esi, aes32esmi, aes64es, aes64esm, aes64ks1i, aes64ks2. Zknd Extension: Added support for the Zknd instruction set. It adds AES decryption support for scalar cryptography. These instructions are aes32dsi, aes32dsmi, aes64ds, aes64dsm, aes64im, aes64ks1i, aes64ks2. Note: The aes64ks1i and aes64ks2 instructions are present in both the Zknd and Zkne extensions. Zknh Extension: Added support for the Zknh instruction set. It adds the hash function instructions support for scalar cryptography. These instructions are sha256sig0, sha256sig1, sha256sum0, sha256sum1, sha512sig0h, sha512sig0l, sha512sig1h, sha512sig1l, sha512sum0r, sha512sum1r, sha512sig0, sha512sig1, sha512sum0, sha512sum1. * Modifications Updated the ALU and decoder to recognize and handle Zbkx instructions. For Zkne, Zknd & Zknh, the decoder will now select the AES unit as functional unit instead of the ALU. The complete Zkn extension is added under the ZKN bit for ease of use. This configuration will also require the RVB (bitmanip) bit to be set. Note: The Zkn extension does not require the use of vectorial fpu. * AES Functional Unit A new functional unit was created inside the execute stage that will handle all AES and Hashing instructions (Zkne, Zknd, Zknh). A new package "aes_pkg" handles all AES functions such as sbox substitution, mix columns, etc. aes_unit * Documentation and Reference The official RISC-V Cryptography Extensions Volume I was followed to ensure alignment with ratification. The relevant documentation for Zbkx, Zkne, Zknd and Zknh instructions was also added. * Verification Assembly Tests: The instructions were tested and verified with the K module of both 32 bit and 64 bit versions of the riscv-arch-tests to ensure proper functionality. These tests check for ISA compliance, edge cases and use assertions to ensure expected behavior. |
||
---|---|---|
.. | ||
01_cva6_user | ||
02_cva6_requirements | ||
03_cva6_design | ||
04_cv32a65x | ||
05_cva6_apu | ||
06_cv64a6_mmu | ||
07_cv32a60x | ||
_static | ||
common | ||
csr-from-ip-xact | ||
design | ||
riscv-isa | ||
scripts | ||
user_guide | ||
.gitignore | ||
conf.py | ||
index.rst | ||
Makefile | ||
README.md | ||
requirements.txt |
CVA6 documentation
CVA6 documentation is published as a Read the Docs documentation.
It can be generated by running make
in this directory.
This generates all necessary sub-documents.
Configuration-specific manuals
For each supported target (e.g. cv32a65x
), there are two manuals included in the main documentation: a tailored RISC-V instruction set manual, and a design documentation.
These documents are generated when building the main documentation.
Instruction set manual
Instruction set manuals (privileged & unprivileged) are based on the official RISC-V Instruction Set Manual repository. Some parts are stripped down or annotated to only include what's relevant for each specific configuration.
These manuals can be manually generated with: make -C 04_cv32a65x/riscv priv-html unpriv-html
.
Replace 04_cv32a65x
with the desired target.
Some of the files used in this documentation (config.adoc
) are directly generated from the RTL.
Design documentation
Design documentation describes the internal architecture of the CVA6 processor.
It can be manually generated with: make -C 04_cv32a65x/design design-html
.
Some of the files used in this documentation (config.adoc
, parameters.adoc
, port_*.adoc
, csr.adoc
, isa.adoc
) are directly generated from the RTL.