Guillaume Chauvon 65285e5498 Dev/hpdcache fpga (#2586) ... Set HPDCACHE as default cache for FPGA boot configuration ie. cv32a6_imac_sv32		2024-11-07 16:50:48 +01:00
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ex_trace_item.svh	Parametrization step 3 part 2 (#1939)	2024-03-18 12:06:55 +01:00
find_first_one.sv	Re-organize CVA6 and APU (#725)	2021-09-24 17:21:19 +02:00
hpdcache_sram_1rw.sv	Dev/hpdcache fpga (#2586)	2024-11-07 16:50:48 +01:00
hpdcache_sram_wbyteenable_1rw.sv	Dev/hpdcache fpga (#2586)	2024-11-07 16:50:48 +01:00
instr_trace_item.svh	Parametrization step 3 part 2 (#1939)	2024-03-18 12:06:55 +01:00
instr_tracer.sv	[Xcelium flow] Xrun compile fixes (#2389)	2024-07-25 07:37:43 +02:00
sram.sv	[Xcelium flow] Xrun compile fixes (#2389)	2024-07-25 07:37:43 +02:00
sram_cache.sv	Add support for cv32a65x dedicated synthesis (#2178)	2024-06-04 10:58:09 +02:00
tc_sram_fpga_wrapper.sv	Optimize FPGA memories (#989)	2022-11-08 23:15:02 +01:00
tc_sram_wrapper.sv	Remove email adress to avoid email robot spaming (#1094)	2023-03-06 06:57:25 +01:00
tc_sram_wrapper_cache_techno.sv	Add support for cv32a65x dedicated synthesis (#2178)	2024-06-04 10:58:09 +02:00