Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Find a file
Andreas Traber 73dd948f59 Working on debug support
Most features have a preliminary support now, i.e. software breakpoints
work in general, NPC and PPC SPR are integrated and fully working, so it
is possible to set a new PC from the debugger

There are probably still some bugs in corner cases, and I'm pretty sure
jumps are not working nicely in single-stepping mode
2015-08-10 17:00:02 +02:00
include Cleanup defines 2015-08-03 15:01:03 +02:00
.gitignore Added vim swap file 2015-07-24 15:26:32 +02:00
alu.sv Updated all file headers 2015-07-24 15:26:12 +02:00
compressed_decoder.sv Four more compressed instructions 2015-07-24 18:24:18 +02:00
controller.sv Working on debug support 2015-08-10 17:00:02 +02:00
cs_registers.sv Working on debug support 2015-08-10 17:00:02 +02:00
debug_unit.sv Working on debug support 2015-08-10 17:00:02 +02:00
ex_stage.sv Updated all file headers 2015-07-24 15:26:12 +02:00
exc_controller.sv Updated all file headers 2015-07-24 15:26:12 +02:00
id_stage.sv Add post-increment and reg-reg stores 2015-07-31 01:39:51 +02:00
if_stage.sv Fix constant names 2015-08-03 15:21:48 +02:00
instr_core_interface.sv Updated all file headers 2015-07-24 15:26:12 +02:00
load_store_unit.sv Updated all file headers 2015-07-24 15:26:12 +02:00
mult.sv Updated all file headers 2015-07-24 15:26:12 +02:00
register_file.sv Updated all file headers 2015-07-24 15:26:12 +02:00
riscv_core.sv Working on debug support 2015-08-10 17:00:02 +02:00
wb_stage.sv Updated all file headers 2015-07-24 15:26:12 +02:00