mirror of
https://github.com/lowRISC/ibex.git
synced 2025-04-24 13:57:19 -04:00
a1902004f9
This parameter forces a reset of all registers inside the core. This is required to guarantee a common starting point for lockstep and thus prevent spurious lockstep failure alerts. Another minor change in this commit rearranges the writeback stage multiplexing to gate incoming lsu write data when not valid. This stops any X values from the data bus propagating to the register file signalling (and thus to the lockstep comparison) which would cause the lockstep alert to be X. It has the side effect of possibly reducing power consumption in the register file. Signed-off-by: Tom Roberts <tomroberts@lowrisc.org> |
||
|---|---|---|
| .. | ||
| ibex_alu.sv | ||
| ibex_branch_predict.sv | ||
| ibex_compressed_decoder.sv | ||
| ibex_controller.sv | ||
| ibex_core.f | ||
| ibex_core.sv | ||
| ibex_counter.sv | ||
| ibex_cs_registers.sv | ||
| ibex_csr.sv | ||
| ibex_decoder.sv | ||
| ibex_dummy_instr.sv | ||
| ibex_ex_block.sv | ||
| ibex_fetch_fifo.sv | ||
| ibex_icache.sv | ||
| ibex_id_stage.sv | ||
| ibex_if_stage.sv | ||
| ibex_load_store_unit.sv | ||
| ibex_lockstep.sv | ||
| ibex_multdiv_fast.sv | ||
| ibex_multdiv_slow.sv | ||
| ibex_pkg.sv | ||
| ibex_pmp.sv | ||
| ibex_prefetch_buffer.sv | ||
| ibex_register_file_ff.sv | ||
| ibex_register_file_fpga.sv | ||
| ibex_register_file_latch.sv | ||
| ibex_top.sv | ||
| ibex_top_tracing.sv | ||
| ibex_tracer.sv | ||
| ibex_tracer_pkg.sv | ||
| ibex_wb_stage.sv | ||