mirror of
https://github.com/lowRISC/ibex.git
synced 2025-04-24 13:57:19 -04:00
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
| docs/datasheet | ||
| include | ||
| .gitignore | ||
| alu.sv | ||
| compressed_decoder.sv | ||
| controller.sv | ||
| cs_registers.sv | ||
| debug_unit.sv | ||
| decoder.sv | ||
| ex_stage.sv | ||
| exc_controller.sv | ||
| hwloop_controller.sv | ||
| hwloop_regs.sv | ||
| id_stage.sv | ||
| if_stage.sv | ||
| LICENSE | ||
| load_store_unit.sv | ||
| mult.sv | ||
| prefetch_buffer.sv | ||
| prefetch_L0_buffer.sv | ||
| register_file.sv | ||
| register_file_ff.sv | ||
| riscv_core.sv | ||
