Commit graph

185 commits

Author SHA1 Message Date
stnolting
8636de752a fixing VUnit windows workflow 2021-07-02 12:42:30 +02:00
umarcor
ec9722ee55 [setups/examples] add Fomu MixedLanguage 2021-06-20 14:29:02 +02:00
Lars Asplund
917b7c8d12 Added option to print a selected subset of information from processor_check to UART0 during simulation. 2021-06-16 22:51:55 +02:00
umarcor
c8d614a773 [setups/examples] add iCESugar Minimal 2021-06-16 15:43:41 +02:00
umarcor
11967543c9 [setup/examples] add iCESugar MinimalBoot 2021-06-16 02:52:25 +02:00
umarcor
0f1c3dd7a8 [ci/generate-job-matrix] fix UPduino_v3 artifact (bitstream) extension 2021-06-15 21:51:02 +02:00
umarcor
f49a108c6d [sim] make ghdl_sim.sh executable 2021-06-13 23:41:36 +01:00
stnolting
93697d8842 [.github/workflows/Processor] (re-)added explicit script permissions
* gihub desktop (on windows) seems to have issues when uploading file permissions 🤔
2021-06-13 23:45:29 +02:00
stnolting
6eff0dfea9 [sim} clean-up
* removed vivado folder
* moved ghdl script to sim folder
* removed ghdl folder
2021-06-13 23:36:19 +02:00
stnolting
b6564bd924 [.github\workflows\Windows] removed push trigger 2021-06-13 23:35:03 +02:00
umarcor
560d3a00ff [ci] move Windows/MSYS2 jobs to a new workflow named 'Windows' 2021-06-12 20:25:30 +02:00
umarcor
9bbfee4240 [ci/Implementation] generate example matrix in a single step 2021-06-12 20:06:59 +02:00
umarcor
25feb84ab2 [ci] add MSYS2 jobs to Implementation and Processor workflows 2021-06-12 20:06:59 +02:00
umarcor
ccb6eb7301 [ci/riscv-arch-test] make test script executable 2021-06-11 18:50:39 +02:00
stnolting
0dac2cf955
[workflows/riscv-arch-test] fixed GCC installation 2021-06-11 16:37:13 +02:00
umarcor
07a80ed976 [ci/Processor] split VUnit tests to a job 2021-06-11 16:11:10 +02:00
Lars Asplund
dcc6513f2c [sim/VUnit] support CLI argument for selecting the expected UART responses 2021-06-11 11:47:04 +02:00
umarcor
289b6551d2 [ci/Processor] clean simulation artifacts between runs 2021-06-10 22:41:45 +02:00
Lars Asplund
76df52155f [ci/Processor] run VUnit test(s) 2021-06-10 22:01:14 +02:00
umarcor
e6ff2a52e2 [setups/examples] add Fomu Minimal 2021-06-10 19:29:59 +02:00
umarcor
d895553d66 [setups/examples] add Fomu UP5KDemo 2021-06-10 19:29:58 +02:00
umarcor
073264c34b [setups/examples] add Fomu MinimalBoot 2021-06-10 19:29:58 +02:00
umarcor
ac931dbd3b [ci/Implementation] fix typo in pull_request path filter 2021-06-10 03:32:52 +02:00
umarcor
d8afe8eb30 [setups] create subdirs 'vivado', 'quartus' and 'radiant' 2021-06-10 03:09:56 +02:00
umarcor
78d5e63b62 [setups] move 'boards' and 'examples' into subdir 'setups' 2021-06-08 15:39:34 +02:00
umarcor
161bafe63f [examples] add UPduino_v3 MinimalBoot 2021-06-08 13:59:28 +02:00
umarcor
534d6e13c2 create subdir 'examples'
* [boards/osflow/synthesis.mk] support both DESIGN_SRC and BOARD_SRC
* [boards/osflow/UPduino_v3] move BoardTop and ProcessorTop to examples and rtl/templates/processor, respectively
* [ci] update 'Implementation' workflow
2021-06-08 13:33:48 +02:00
umarcor
f5cf1377af [boards/osflow/UPduino_v3/Makefile] support Yosys with built-in GHDL by making '-m ghdl' optional through GHDL_PLUGIN_MODULE 2021-06-08 12:04:25 +02:00
umarcor
3b2aab65a7 [boards] create subdir osflow; move and rename UPduino_v3_ghdl-yosys-nexpnr to osflow/UPduino_v3 2021-06-08 12:04:25 +02:00
stnolting
5c6d331f8a [.github/workflow/Implementation] fxed typo 2021-06-04 10:20:38 +02:00
stnolting
9372dfeadf [.github/worklfows/Implementation] fine-tuned trigger 2021-06-04 10:17:17 +02:00
umarcor
e78e43d15b docs: split User Guide 2021-06-04 01:03:40 +02:00
umarcor
437d02803c [ci/Processor] use LLVM backend 2021-06-03 16:33:11 +02:00
umarcor
d692097626 [ci] cleanup shell scripts 2021-06-03 16:33:11 +02:00
Unai Martinez-Corral
3ee1ac5df0
[ci] set fetch-depth to 0, for git describe to work 2021-05-25 15:02:43 +02:00
umarcor
050125a669 [ci] rename workflow 'Processor Check' to 'Processor' 2021-05-23 18:13:29 +02:00
umarcor
cf3f4a8754 [ci] add GitHub Actions workflow 'Implementation' 2021-05-23 18:13:29 +02:00
umarcor
5220450476 [ci] add figures to HTML artifact 2021-05-22 20:38:22 +02:00
umarcor
3cfcb33c38 [ci] do not deploy from PRs or non-master non-tagged branches/commits 2021-05-22 20:38:21 +02:00
umarcor
d25527c6b3 [ci] use eine/tip for uploading artifacts to (pre-)releases 2021-05-22 20:38:21 +02:00
stnolting
968d2f7be6 [sw/example] renamed cpu_test -> processor_check 2021-05-20 07:21:41 +02:00
umarcor
762d1a1ca9 ci: deploy datasheet (HTML and PDF) to GitHub Pages, along with Doxygen output 2021-05-18 05:34:28 +02:00
umarcor
4450326794 add Makefile 2021-05-18 05:15:42 +02:00
umarcor
6a2d00f4fd docs: add HTML datasheet 2021-05-18 05:15:42 +02:00
umarcor
8c6887d59e ci: merge workflows 'gh-pages' and 'build_datasheet' into 'Documentation' 2021-05-18 04:43:17 +02:00
umarcor
413d0534b0 ci: remove redundant Action 2021-05-18 04:43:17 +02:00
umarcor
3eb863d474 ci: cleanup 2021-05-18 04:43:17 +02:00
stnolting
c6403072a4 [.github/workflows] minor edits 2021-04-29 12:34:03 +02:00
stnolting
84e4cde0b7 [.github/workflows/build_datasheet] fixed trigger paths 2021-04-28 19:13:18 +02:00
stnolting
a6463bbc64
Update build_datasheet.yml 2021-04-28 16:40:19 +02:00