17 commits

Author	SHA1	Message	Date
Blaise Tine	f7887d8720	refactoring device memory allocation and cleanup	2022-01-28 21:57:16 -05:00
Blaise Tine	27a65fdee7	driver refactoring	2021-11-14 09:05:15 -05:00
Blaise Tine	3cc1190cd7	CSRs I/O refactoring	2021-06-11 03:08:07 -07:00
Blaise Tine	e4a00dd0d9	fixed loader script stack setup	2020-12-31 22:37:20 -05:00
Blaise Tine	703a861fe9	added support for write-through cache, removed cache snooping support	2020-12-23 23:51:02 -08:00
Blaise Tine	d5438fd591	merging perf counters	2020-12-08 21:02:39 -08:00
Xandy Liu	1595ff08e2	PERF pipeline stalls and cache	2020-12-08 01:14:41 -05:00
Blaise Tine	2e0f51af80	fixed instr/cycle perf counter	2020-11-12 11:41:25 -08:00
Blaise Tine	fba2fa03c7	fixed new AFU Driver bugs - now functional	2020-09-09 17:05:48 -04:00
Blaise Tine	112d8ab815	adding CSR support to rtlsim driver	2020-09-04 06:51:31 -04:00
Blaise Tine	e54425404e	fixed driver unrsolved dependencies	2020-08-27 06:41:40 -04:00
Blaise Tine	0b355f228e	ibuffer addition	2020-08-22 00:22:04 -07:00
Blaise Tine	5d088d67c8	Gather FPGA perf stats	2020-07-01 09:30:12 -07:00
Blaise Tine	83a1695c73	OPAE CSR access	2020-06-30 18:14:06 -07:00
Blaise Tine	2de61b5982	get device caps from CSRs	2020-06-30 00:08:23 -07:00
Blaise Tine	77a52ea20b	optimized opae cci to dev memcpy using double buffering and request window to work around unordered read requests	2020-04-23 01:30:45 -07:00
Blaise Tine	12dc4d6874	refactoring fixes	2020-04-14 19:39:59 -04:00