66 commits

Author	SHA1	Message	Date
Blaise Tine	4bbd7bf408	performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,	2020-12-19 02:45:06 -08:00
Blaise Tine	dada72f830	minor update	2020-12-06 15:28:58 -08:00
Blaise Tine	b7a724410b	update DRAM simulation - reduce the latency of duplicate requests (simulate DRAM cache)	2020-12-03 07:30:19 -08:00
Blaise Tine	457f831435	fixed scoreboard stall	2020-11-28 03:14:20 -05:00
Blaise Tine	461be0880d	fixed FPU-CSR data dependence	2020-11-25 09:05:38 -08:00
Blaise Tine	664ce28426	minor update	2020-11-23 12:21:39 -08:00
Blaise Tine	2d4fef6dd6	fixed fp_noncomp bug, ci toolchain script update, increased DRAM latency to 100 cycles	2020-11-23 11:59:40 -08:00
Blaise Tine	1795980a52	L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization	2020-11-21 09:47:56 -08:00
Blaise Tine	203a184008	fixed bank_core_req_abr critical path	2020-11-08 18:25:32 -08:00
Blaise Tine	5be1d85648	cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count	2020-11-02 01:50:12 -08:00
Blaise Tine	4bd5ee2673	fixed rtlsim regression	2020-10-26 12:59:58 -04:00
Blaise Tine	43ae82e788	vlsim fix, verilator fst trace, use ram optimization	2020-10-25 16:40:50 -07:00
Blaise Tine	f6f95e0c46	mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL	2020-09-19 14:45:42 -04:00
Blaise Tine	0fab1ddd92	adding support for verilator-driven AFU driver: vlsim	2020-09-08 13:05:26 -04:00
Blaise Tine	112d8ab815	adding CSR support to rtlsim driver	2020-09-04 06:51:31 -04:00
Blaise Tine	fde3f46798	ibuffer optimization	2020-08-26 04:44:36 -07:00
Blaise Tine	b8cd3b0b28	gpr pipeline optimization	2020-08-01 12:38:30 -04:00
Blaise Tine	c9755a0c48	lkg build with pipeline + FPU fixes	2020-07-31 09:29:44 -04:00
Blaise Tine	f01afcc5cd	floating point support fixes + riscv-tests update	2020-07-28 02:19:11 -04:00
Blaise Tine	e0a9089647	floating point support fixes	2020-07-27 16:01:56 -04:00
Blaise Tine	7c86b68977	pipeline refactoring: centralized issue buffer	2020-07-26 11:21:08 -04:00
Blaise Tine	fb44de8017	fixed simulator leak	2020-07-21 06:17:41 -07:00
Blaise Tine	577a5791dc	pipeline refactoring	2020-07-20 08:04:04 -04:00
Blaise Tine	25f66e6490	pipeline refactoring	2020-07-19 05:03:47 -04:00
Blaise Tine	d33916f1e0	minor update	2020-06-29 00:38:59 -07:00
Blaise Tine	8a306de02d	runtime static library	2020-06-27 14:13:13 -04:00
Blaise Tine	b7d7e69f47	fixed assertion in lsu_unit	2020-06-26 00:27:55 -04:00
Blaise Tine	5e718c2676	refactoring	2020-06-23 09:54:40 -07:00
Blaise Tine	68d9fc9a75	driver basic test and demo test refactoring	2020-06-19 09:12:07 -07:00
Blaise Tine	1688c65050	scope fixes	2020-06-09 10:19:28 -04:00
Blaise Tine	171d46b501	fix l2 cache issues	2020-06-04 18:34:14 -04:00
Blaise Tine	626a4f6fc1	merge	2020-06-03 06:25:34 -04:00
Blaise Tine	106d707024	verilator suppor for opae (partial)	2020-06-03 06:22:49 -04:00
Blaise Tine	e01c411b20	opae rtl fixes	2020-06-01 23:06:13 -07:00
Blaise Tine	611ceb000a	fixed warp_sched lock bug	2020-05-28 08:52:20 -04:00
Blaise Tine	9e5885b820	adding dram writeenable support + scheduler bug fixes	2020-05-27 19:00:23 -04:00
Blaise Tine	a9f896b4f3	fixed snoop forwarding bug and single bank support	2020-05-24 04:29:43 -04:00
Blaise Tine	3a9e79d979	revert byte_enable tag structure	2020-05-23 22:23:25 -04:00
Blaise Tine	c54fa50715	fixed snoop forwarder dequue to support out of order responses	2020-05-23 20:19:54 -04:00
Blaise Tine	507622f1a1	fixed simulator snoop handling	2020-05-23 19:26:59 -04:00
Blaise Tine	70dadca9fe	fix scheduler rename_table X values - reverted valid bits	2020-05-23 00:22:56 -04:00
Blaise Tine	1102871180	force random values for unitialized signals	2020-05-20 20:57:15 -04:00
Blaise Tine	b0b38f6c24	snooping response handling fix	2020-05-12 18:52:24 -04:00
Blaise Tine	1eda9b34d5	snooping response handling fix	2020-05-12 13:36:55 -04:00
Blaise Tine	fcf3800d5d	snooping response handling fix	2020-05-12 13:35:18 -04:00
Blaise Tine	c49f01b769	snooping response handling	2020-05-11 22:55:44 -04:00
Blaise Tine	cc84e0691c	multicore fix	2020-05-10 08:30:04 -04:00
Blaise Tine	59cc0d5be9	rtl multicore fix	2020-05-06 13:33:16 -04:00
Blaise Tine	330bbc4f56	rtl gpr multicore fix	2020-05-06 09:05:10 -04:00
Blaise Tine	b1fdf0a947	fix rtl gpr zero	2020-05-06 05:25:20 -04:00