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picorv32

Verilog 0 0

PicoRV32 - A Size-Optimized RISC-V CPU

Updated 2026-07-30 23:59:00 -06:00

serv

Verilog 0 0

SERV - The SErial RISC-V CPU

asic fpga risc-v verilog

Updated 2026-07-10 06:43:13 -06:00