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picorv32

Verilog 0 0

PicoRV32 - A Size-Optimized RISC-V CPU

Updated 2026-09-07 02:01:21 -06:00

serv

Verilog 0 0

SERV - The SErial RISC-V CPU

asic fpga risc-v verilog

Updated 2026-08-25 06:38:54 -06:00