Côme 758511fd79 docs: fix example of OoO write-back to scoreboard (#1621) ... Multiplication takes two cycles (1 cycle latency) and ALU takes one cycle (no latency). They share the same writeback port so it is not possible to issue an ALU instruction just after a MUL. So the example is wrong, but it is okay if we replace MUL by LOAD as it uses another write-back port. Fix #1106		2023-11-13 10:59:26 +01:00
..
01_cva6_user	removed c.zext.w from rv32 spec (#1563)	2023-10-23 14:55:05 +00:00
02_cva6_requirements	[DOCS] Add Zcb Instructions in CVA6 user guide and requirement specification (#1536)	2023-10-19 16:22:46 +02:00
03_cva6_design	docs: fix example of OoO write-back to scoreboard (#1621)	2023-11-13 10:59:26 +01:00
04_cv32a6_design	Update CVA6 Architecture overview Figure (#1488)	2023-10-02 09:02:33 +02:00
05_cva6_apu	LINT: Initial changes for Lint warnings removal (#1158)	2023-04-24 08:22:56 +02:00
_static	[skip ci] Add hierarchy to the CVA6 documentation (#995)	2022-11-16 11:19:37 -05:00
user_guide	doc: Add cva6_ug_csr.adoc (#817)	2022-02-07 15:01:52 +01:00
.gitignore	First release identifier is v0.1.0 (#994)	2022-11-10 14:29:09 +01:00
conf.py	Add CVXIF chapter in user's guide (#1289)	2023-08-09 15:49:36 +02:00
index.rst	Integrate CV32A6 Design Document and break out CVA6 APU (#1072)	2023-02-21 15:21:04 +01:00
make.bat	doc: Move to read the docs	2020-07-26 13:38:15 +02:00
Makefile	doc: Move to read the docs	2020-07-26 13:38:15 +02:00
requirements.txt	Update Sphinx version	2023-03-03 11:33:53 +01:00