1885 commits

Author	SHA1	Message	Date
stnolting	c7991b544a	[doc] updated documentation	2020-10-25 22:05:05 +01:00
stnolting	c9d213bf94	[doc] updated documentation	2020-10-24 15:57:12 +02:00
stnolting	919d733b67	[doc/figurs] added exemplary axi SoC setup figure	2020-10-24 14:55:26 +02:00
stnolting	e1212d81d4	[twi] added control register bit to enable/allow or disabled/not_allow SCL clock stretching by peripherals	2020-10-22 22:37:03 +02:00
stnolting	3f3f790469	[doc] updated documentation	2020-10-22 20:29:25 +02:00
stnolting	6509cce14b	[doc] updadted documentation	2020-10-20 19:51:55 +02:00
stnolting	96d33ae583	[docs] updated documentation (for new second CFU)	2020-10-18 17:43:10 +02:00
stnolting	7084048551	[docs] updated documentation	2020-10-17 19:18:04 +02:00
stnolting	1e7bd7bb9b	[doc] updated coremark performance results (when using FAST_SHIFT_EN option)	2020-10-17 11:24:11 +02:00
stnolting	8a54c7bdd9	[doc] updated data sheet (mzext csr bits)	2020-10-16 21:19:56 +02:00
stnolting	1a5105f0b5	added official architecture ID	2020-10-13 17:50:34 +02:00
stnolting	ea7272e280	updated performance results; added section regarding default makefile flags (gcc switches)	2020-10-12 12:24:34 +02:00
stnolting	2e4894933c	updated to v1.4.4.8	2020-10-11 20:55:09 +02:00
stnolting	28073c37ee	added issue engine	2020-10-11 20:53:03 +02:00
stnolting	c2bbdff23f	added more details regarding wishbone protocol modes to section '3.4.4. Processor-External Memory Interface (WISHBONE)'	2020-10-11 16:45:50 +02:00
stnolting	1ed12fa22a	moved project change log from NEORV32.pdf to CHANGELOG.md	2020-10-09 18:28:28 +02:00
stnolting	9a5a3f3017	removed CPU's BUS_TIMEOUT and processors's EXT_MEM_TIMEOUT generics; bus timeout is now configured via bus_timeout_c in VHDL package file	2020-10-08 20:42:19 +02:00
stnolting	7070abe1d3	updated documentation	2020-10-08 19:34:06 +02:00
stnolting	b11103666b	removed DEVNULL unit	2020-10-08 18:47:08 +02:00
stnolting	ad481b9cd0	updated data sheet	2020-10-07 20:59:36 +02:00
stnolting	85856710a5	updated ALU input operands	2020-10-07 17:11:07 +02:00
stnolting	e203f1ffb4	minor updates	2020-10-05 19:36:37 +02:00
stnolting	b25e152b13	updated documentation	2020-10-02 18:51:01 +02:00
stnolting	b908c7f76c	updated documentary	2020-10-01 17:39:54 +02:00
stnolting	785e049e21	added missing ALU input signals	2020-10-01 17:30:36 +02:00
stnolting	e523024643	added CFU interrupt capability	2020-09-27 21:11:04 +02:00
stnolting	da2f300e7b	added CFU hw driver dummy	2020-09-27 20:53:06 +02:00
stnolting	95254a28f3	updated data sheet	2020-09-27 19:48:59 +02:00
stnolting	af105fdfed	updated data sheet (changelog)	2020-09-26 15:37:12 +02:00
stnolting	7d21f1201a	removed 0 input for ALU input mux A	2020-09-26 15:36:58 +02:00
stnolting	3d67970a7d	updated new ALU operand logic; added more details (operand C mux added)	2020-09-26 14:13:05 +02:00
stnolting	7a819a45f7	minor layout edits	2020-09-25 21:28:15 +02:00
stnolting	5ea21027f1	updated data sheet	2020-09-25 21:21:04 +02:00
stnolting	5643c2927a	removed zero-insertion logic	2020-09-25 21:18:31 +02:00
stnolting	83e5bde937	fixed GPIO labels: in and out ports are 32-bit wide	2020-09-24 22:35:12 +02:00
stnolting	172cd3465a	updated data sheet	2020-09-16 20:32:58 +02:00
stnolting	121e9e58c1	added CFU	2020-09-15 13:48:25 +02:00
stnolting	ae340b3198	updated docs	2020-09-14 10:03:56 +02:00
stnolting	77191df181	updated data sheet	2020-09-11 21:35:32 +02:00
stnolting	957ce7c82c	added more details to section regarding processor address space and external memory interface	2020-09-03 22:42:02 +02:00
stnolting	652a63a203	added more details to section 'processor address space'; fixed memory space configuration generic names	2020-09-02 21:05:10 +02:00
stnolting	46005681e6	updated documentation	2020-09-01 22:03:55 +02:00
stnolting	1f85fe4772	updated documentation for new version	2020-08-29 16:47:00 +02:00
stnolting	31826d3cfa	updated documentation	2020-08-23 19:57:30 +02:00
stnolting	335585c3c9	minor updates	2020-08-20 20:55:11 +02:00
stnolting	54283c13cd	minor updates and fixes	2020-08-14 18:05:00 +02:00
stnolting	f2e76176d8	updated documentation	2020-08-06 20:41:07 +02:00
stnolting	7a760cc097	minor edits and updates	2020-08-03 21:45:05 +02:00
stnolting	b034d734dd	added RISC-V logo; minor edits	2020-08-03 18:15:15 +02:00
stnolting	eb1fc5d312	minor edits and clean-ups	2020-07-30 21:25:30 +02:00