1885 commits

Author	SHA1	Message	Date
stnolting	8f0cd29b2c	minor edits and updates	2020-07-30 18:44:33 +02:00
stnolting	b37ac5196c	updated documentation for HW version 1.3.5.0	2020-07-29 19:09:30 +02:00
stnolting	be1ca4ff5a	added U and PMP options	2020-07-29 16:42:47 +02:00
stnolting	5bf93f6174	added U and PMP options	2020-07-29 16:42:32 +02:00
stnolting	819136bd4f	fixed typo	2020-07-25 14:37:38 +02:00
stnolting	855c7436ca	updated documentation (HW v1.3.0.0)	2020-07-25 13:55:44 +02:00
stnolting	adf3d95957	fixed resolution & crappy rendering	2020-07-25 13:54:08 +02:00
stnolting	f7a8226e56	added IRQ signal, some clean-up	2020-07-25 10:11:41 +02:00
stnolting	b0e94fcebf	updated documentation	2020-07-21 21:37:03 +02:00
stnolting	819f0488c3	added Zifencei extension option	2020-07-21 19:38:12 +02:00
stnolting	4a2f859e07	updated documentation	2020-07-20 15:03:19 +02:00
stnolting	72a49f94a0	added SYSINFO module	2020-07-20 13:43:33 +02:00
stnolting	24aaad85f5	minor updates	2020-07-17 23:39:11 +02:00
stnolting	4c491d9326	updated cpu overview - CPU now has separate I and D interface busses	2020-07-17 17:23:09 +02:00
stnolting	192b9a3b1a	updated doc for new hardware version	2020-07-14 13:54:48 +02:00
stnolting	a50816b71f	updated documentary	2020-07-10 19:48:52 +02:00
stnolting	6125732b33	updated documentation	2020-07-09 16:53:28 +02:00
stnolting	9dbea7b544	removed pointless version number	2020-07-08 16:17:23 +02:00
stnolting	f8dd93f849	added simplified cpu diagram	2020-07-08 16:10:48 +02:00
stnolting	a8c8c5bd7d	renamed processor overview figure	2020-07-08 16:10:32 +02:00
stnolting	aaf88b92b1	changed default doxygen build folder	2020-07-07 22:05:10 +02:00
stnolting	86f55fa745	testing travis ci: automatic doxygen doc deployment- part 5	2020-07-07 21:55:54 +02:00
stnolting	960770c8d8	testing travis ci: automatic doxygen doc deployment	2020-07-07 21:17:04 +02:00
stnolting	aec70507d6	updates and clean-ups	2020-07-07 20:40:41 +02:00
stnolting	abeb1200d1	doc layout and typo fixes; minor updates	2020-07-07 13:02:09 +02:00
stnolting	4e09225558	added missing FENCE instruction; added new generic to implement Zifencei CPU extension for instruction stream snc. (FENCE.I)	2020-07-06 21:45:42 +02:00
stnolting	d38509fc92	removed mtinst CSR since it is not ratified by the official RISC-V specs yet	2020-07-06 19:32:20 +02:00
stnolting	d99ea599c5	updated documentary for new processor version 1.0.0.0	2020-07-05 23:34:09 +02:00
stnolting	6177a8b895	removed legacy stuff from doxygen makefile	2020-07-02 21:19:48 +02:00
stnolting	0567703e77	updated documentary!	2020-06-27 13:56:25 +02:00
stnolting	35e0f622b9	updated documentary	2020-06-25 20:16:52 +02:00
stnolting	3c2819f400	minor edits and typo/layout fixes	2020-06-24 17:10:37 +02:00
stnolting	fdebde63d6	fixed links; added PDF icon	2020-06-23 19:49:39 +02:00
stnolting	420fe525cb	minor edits	2020-06-23 17:44:28 +02:00
stnolting	bee421876a	initial commit	2020-06-23 17:43:03 +02:00