Commit graph

1896 commits

Author SHA1 Message Date
stnolting
a028e4cde4 Merge branch 'main' into mmu_dev 2024-02-16 09:31:25 +01:00
stnolting
b66d510dcd [pmp] constrain ADDR read-back for available modes 2024-02-16 06:45:30 +01:00
stnolting
a544c4f470 [top] allow disabling certain PMP modes 2024-02-16 06:24:58 +01:00
stnolting
a9d28f3430 🚀 preparing release v1.9.5 2024-02-16 05:54:37 +01:00
stnolting
102d344f2d [rtl] add DMA fence operation 2024-02-15 19:00:26 +01:00
stnolting
1d67e3e222 🐛 fix another C-ISA loophole 2024-02-14 21:48:55 +01:00
stnolting
36ae947c32 [v1.9.4.11] update version id 2024-02-11 15:05:36 +01:00
stnolting
fa71f9aacc [fpu] remove trailing spaces 2024-02-11 15:00:01 +01:00
stnolting
023bac0763 [fpu] add missing signal to sensitivity list 2024-02-11 14:55:18 +01:00
stnolting
da00ef21b1 [fpu] fix incomplete comparison
operands were not of the same size
2024-02-11 14:54:10 +01:00
stnolting
2019d4e309 [fpu] add missing signals to sensitivity lists 2024-02-11 14:52:09 +01:00
stnolting
71824ad7b4
Merge branch 'main' into main 2024-02-11 14:47:09 +01:00
stnolting
5235d6ec84 [cpu] bus fence comment edit 2024-02-11 11:26:16 +01:00
stnolting
54ead5ff9a [control] minor edits
- terminate unused hpmevent_cfg registers (prevent synthesis warning)
- hardwire IPB size to 2; experiments have shown this is the most efficient configuration (performance vs. area)
2024-02-11 10:26:07 +01:00
stnolting
656c820b1d update bootloader
do not allow booting from XIP flash if XIP module not implemented (prevent bootloader crash)
2024-02-11 10:24:43 +01:00
stnolting
0118da399e
Merge branch 'main' into main 2024-02-10 23:49:27 +01:00
stnolting
33e5f0d333 [rtl] fix HPM null range assertions 2024-02-10 08:22:26 +01:00
stnolting
3e718ece09 [top] remove spaces 2024-02-10 07:56:51 +01:00
stnolting
72044a0b6d 🐛 fix fence signal pass-through in caches 2024-02-10 07:06:02 +01:00
Mikael Mortensen
c27c14aa07
Merge branch 'stnolting:main' into main 2024-02-09 17:33:58 -08:00
stnolting
d70a70265f [package] remove top's fence signals 2024-02-09 17:37:30 +01:00
stnolting
50068e8168 [intercon] add fence signal to bus switch 2024-02-09 17:08:29 +01:00
stnolting
c4153dfa98 [DMA] DMA cannot issue a fence operation (yet?) 2024-02-09 17:08:09 +01:00
stnolting
eccfb921e5 [caches] clear on bus fence 2024-02-09 17:07:49 +01:00
stnolting
8630587d22 [cpu] integrate fence signal into CPU bus
- new bus element ".fence"
- ⚠️ fence and fence.i instructions behave exactly the same
2024-02-09 17:05:42 +01:00
stnolting
7e7e360b7f ⚠️ [top] remove fence signals 2024-02-09 16:58:30 +01:00
stnolting
088e6b469f update version to v1.9.4.6 2024-02-09 15:21:37 +01:00
stnolting
e53ec12a9e Merge branch 'main' into xip_cache 2024-02-09 15:20:12 +01:00
Mikael Mortensen
35325df177
[CPU] close further illegal instruction loopholes (#797) 2024-02-09 06:19:11 -08:00
stnolting
09e556a925 [bootloader] update XIP configuration 2024-02-09 14:00:12 +01:00
stnolting
0b720fcc3f [rtl] update XIP module
add configurable XIP cache
2024-02-09 12:20:04 +01:00
stnolting
f4be24eda0 [top] minor code clean-up 2024-02-09 12:03:15 +01:00
stnolting
8cfb56f286 [top] update/add XIP generics 2024-02-09 11:50:39 +01:00
stnolting
30e5c6e20c [rtl] add legacy folder
for deprecated core modules that might still be handy for building custom processor setups
2024-02-09 09:06:06 +01:00
stnolting
557b1f21c0 [rtl] update to version 1.9.4.5 2024-02-09 07:00:57 +01:00
stnolting
f0c210de14 [CPU] close further illegal instruction loopholes 2024-02-09 06:57:13 +01:00
Mikael Mortensen
e16a145911
Missed a change
Signed-off-by: Mikael Mortensen <119539842+mikaelsky@users.noreply.github.com>
2024-02-07 12:51:30 -08:00
Mikael Mortensen
85a5716c25
Update neorv32_cpu_cp_fpu.vhd
Signed-off-by: Mikael Mortensen <119539842+mikaelsky@users.noreply.github.com>
2024-02-07 12:26:00 -08:00
Mikael Mortensen
5a7f63b230
Update neorv32_package.vhd
Signed-off-by: Mikael Mortensen <119539842+mikaelsky@users.noreply.github.com>
2024-02-07 11:57:36 -08:00
stnolting
f83c5bdff0 [mmu] re-add MMU entry read-back logc 2024-02-06 20:32:56 +01:00
stnolting
ad3ef06342 Merge branch 'main' into mmu_dev 2024-02-04 18:12:52 +01:00
stnolting
ae62ec327b [mmu] add check for reserved PTE attributes 2024-02-04 12:11:17 +01:00
stnolting
19389945b7 [rtl] update version ID 2024-02-04 12:00:37 +01:00
stnolting
aaa3e24e4a [cpu] fix non-stable privilege signal 2024-02-04 12:00:24 +01:00
stnolting
2daf524a1c [mmu] comment edits 2024-02-04 02:07:51 +01:00
stnolting
c52cf9a602 [mmu] remove TLB hardware reset
this allows to map the TLBs to LUTRAM / distributed RAM (/ blockRAM?)
2024-02-04 01:59:47 +01:00
stnolting
d72e73b15a [mmu] make TLB write-only
let's save some hardware here
2024-02-04 01:17:40 +01:00
stnolting
2303c356b1 [mmu] implement separate instruction and data TLBs 2024-02-04 01:12:35 +01:00
stnolting
715715b372 Merge branch 'main' into mmu_dev 2024-02-03 23:06:47 +01:00
stnolting
9a92738678
Merge branch 'main' into main 2024-02-03 21:40:42 +01:00