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Author SHA1 Message Date
Olof Kindgren
1029e781d3 wip 2024-02-20 09:51:16 +01:00
Olof Kindgren
923b53ce0b Add hello world ASM example 2024-02-20 09:48:34 +01:00
Olof Kindgren
a92965b359 Add cycle counter to servant testbench 2024-02-20 09:43:33 +01:00
Olof Kindgren
086fff75b6 servile_mux: Only catch writes to sim_sig_adr when signature file is open 2024-02-15 21:39:25 +01:00
Olof Kindgren
88a4711593 Use servile as base for serving 2024-02-14 22:06:57 +01:00
Olof Kindgren
970c6fddca Use Servile as a base for servant 2024-02-14 22:06:57 +01:00
Olof Kindgren
8d91e2d288 Add Servile convenience wrapper 
Servile is a new convenience wrapper that implements common common configuration
for SERV-based systems so that they don't have to be repeated in every design.
 2024-02-14 22:06:57 +01:00
Olof Kindgren
1dc37d9fd4 Fix path to GDS file in openlane CI runner 2024-02-14 22:06:57 +01:00
Olof Kindgren
51c7833fa8 Refactor docs 2024-02-14 22:06:57 +01:00
Busted Wing
c469c3174b Update README.md to add blinky to pre-built test software examples 2024-02-05 12:41:04 +00:00
inc
c0320fded4 add support for machdyne kolibri 2024-01-26 22:42:02 +00:00
Liam Beguin
40a9e99f77 add PolarFire Splash Kit support 
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
 2023-12-29 22:39:11 +01:00
Liam Beguin
9d4ebaa358 servant: parameters: specify frequency is to be in MHz 
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
 2023-12-29 22:39:11 +01:00
Liam Beguin
6e9a6601f3 servant: ice: rename service clock gen source 
Make it more explicit that this clock generator is for the ICE FPGA
family.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
 2023-12-29 22:39:11 +01:00
Markus
b2b1110e95
Port to Zephyr v3.5.0 + Fix System Timer (#111) 
zephyr: Port to Zephyr v3.5.0
 2023-12-11 08:49:08 +00:00
Olof Kindgren
adb3f4d5a4 Delete trailing whitespace from RTL 2023-12-03 18:21:01 +01:00
Olof Kindgren
7cc00c8627 Add build.tools to RTD config 2023-11-17 13:53:31 +01:00
Jani Alinikula
bc984f6639 Change timer wraparound behavior to be more useful 2023-11-17 09:27:52 +01:00
Olof Kindgren
bc74a9a1d7 Used named generate statements 
Unnamed generate statements are not recommended and some tools throw
warnings or errors for these.
 2023-11-16 21:38:10 +01:00
Katherine Watson
7a6d5d3fc9 Make serv_alu.v synthesizable with Vivado 2023-11-16 14:41:46 +01:00
Olof Kindgren
c7fc57213c Avoid releasing trap signal too early 
The trap signal is used my the mux in serv_rf_if to decide which
registers to write to. If the trap signal is dropped too early,
the destination address changes while the register is still being
written to.
 2023-10-31 22:21:12 +01:00
uhit332
46a820ee42 support for W=4 2023-10-31 15:53:36 +01:00
uhit332
f9d6b23543 support for W=4 2023-10-31 13:23:17 +01:00
Olof Kindgren
a8fbf688c5 Fix RTD CI action failures 2023-10-31 12:45:31 +01:00
uhit332
2e23b5313a alu with support for W=4 2023-10-31 12:42:52 +01:00
Olof Kindgren
ed4b8198ac Skip disassembly of test cases in riscof plugin 
Disassembly takes a lot of time with some toolchains, so leave that
to the user instead.
 2023-07-21 12:25:25 +02:00
Olof Kindgren
4567214721 Refactor counter in serv_state 2023-07-13 10:29:19 +02:00
Olof Kindgren
f0f2dba67f Add PC tracing capability 
This adds the --trace_pc option to dump the PC after each instruction to a file
called trace.bin
 2023-07-12 22:00:36 +02:00
Olof Kindgren
9bb2f95bf4 Tidy up GH Actions naming 2023-07-10 15:07:38 +02:00
Olof Kindgren
c6e5053c78 Clean up RISCOF support structure 
The RISCOF regression test suite can now be run from a workspace instead
of having to be run from inside the repo. Also removes the need for a
submodule.
 2023-07-10 15:06:13 +02:00
Olof Kindgren
cd3b587364 Add linting for servant and serving to Github actions 2023-06-22 15:49:04 +02:00
Olof Kindgren
8edd456b5d Rewrite serv_rf_ram_if 
This adds some optimizations to serv_rf_ram_if. It also adds a read enable
signal and delays writes one cycle which has the added bonus that no reads
or writes happen in the same cycle for RF_WIDTH > 2. This allows SERV to be
used with single-port RAMs in most cases.
 2023-06-22 15:48:25 +02:00
Olof Kindgren
a6e4d82a30 Enable support for tickless timer driver 2023-06-21 23:19:26 +02:00
Calder Coalson
1268538f9d Add Arty S7-50 support 2023-06-15 18:17:52 +00:00
Olof Kindgren
d4491f1060 Add initial Serving porting information 2023-06-13 09:30:36 +02:00
Olof Kindgren
6893791d01 Add resource table to README 2023-05-18 22:27:08 +02:00
Olof Kindgren
a03f283d74 Clean up servant core file 2023-05-17 12:20:56 +02:00
Olof Kindgren
1327774f02 Fix CMOD A7 servant target 2023-05-17 10:13:02 +02:00
Olof Kindgren
d7006634cb Remove old LibeCores badge 2023-05-14 22:17:37 +02:00
Olof Kindgren
6d980810f9 Update README 2023-05-11 23:27:25 +02:00
Olof Kindgren
f62062d481 Add readthedocs config file 2023-05-11 22:48:11 +02:00
Olof Kindgren
37724d8d9f Fix Github actions 
Repair the lint and CI actions. Add formal verification.
 2023-05-07 22:33:49 +02:00
Olof Kindgren
af230d517b Migrate lint, nexys_a7, tinyfpga_bx and verilator_tb targets to flow API 2023-04-30 21:49:42 +02:00
Olof Kindgren
109acd0a53 Prepare for release 2022-12-25 22:04:52 +01:00
Olof Kindgren
5fa5c5c3c3 Sort all sections in servant.core 2022-12-25 21:49:19 +01:00
Olof Kindgren
9be55f5cad Set align parameter to the value of compressed by default 2022-12-25 21:34:48 +01:00
Abdulwadoodd
04991380df GitHub actions for updated Compliance testing 2022-12-25 21:23:51 +01:00
Abdulwadoodd
174330d06e Updated readme and added instructions to run compliance tests 2022-12-25 21:23:51 +01:00
Abdulwadoodd
121099bf54 Add SAIL-RISCV binaries with reamde instructions 2022-12-25 21:23:51 +01:00
Abdulwadoodd
c1a275db49 Added arch-tests as a submodule 2022-12-25 21:23:51 +01:00