tinebp
22398c991d
ramulator memory addressing bug fix + platform memory refactoring
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2025-01-26 06:28:51 -08:00
MichaelJSr
a2cfeffcfe
Added ifndef statements for the vector extension anywhere they didn't exist already
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Added ifndef statements for the vector extension anywhere they didn't exist already
more ifdef statements
more ifdef
Update decode.cpp
Update decode.cpp
Update decode.cpp
2025-01-14 21:29:47 -08:00
tinebp
5891a1e592
Merge branch 'master' into riscv-vector-isa-simx-clean
2024-12-05 10:17:05 -08:00
tinebp
3ace9bbeda
minor updates
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2024-12-04 06:00:19 -08:00
tinebp
30b0daf050
SimX multiports support fixes
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2024-12-03 05:46:33 -08:00
tinebp
3b454efd56
fixes to SimX's multiports memory support
2024-12-02 17:51:42 -08:00
MichaelJSr
5eecd0e987
Added case for vector-test due to different exitcode
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The vector tests need the cluster exitcodes
2024-11-27 23:50:57 -08:00
Jaewon Lee
e91eb4aed4
merge from master branch
2024-09-12 10:32:02 -04:00
Hanran Wu
ea9560b33b
merge
2024-08-23 17:44:24 -04:00
sij814
ea34239b43
changes made for initial feedback
2024-08-13 16:52:27 -07:00
sij814
de81baaabf
hbm for vortex 2.2
2024-08-12 02:52:47 -07:00
Blaise Tine
69126dfd35
SimX writeback configuration
2024-07-27 17:25:13 -07:00
Blaise Tine
fb141ae522
Ramulator 2.0 with HBM 2.0 support
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Verilator 5.0 support
SimX C++17 requirement
2024-07-21 06:57:13 -07:00
Blaise Tine
3efced37c5
trace INSTANCE_ID refactoring
2024-07-09 13:33:17 -07:00
Jaewon Lee
3caeeeea13
satp_ is not set, then we skip VAT
2024-06-30 00:35:26 -04:00
Jaewon Lee
d531fa6b26
64bit support
2024-06-29 17:43:20 -04:00
Jaewon Lee
02091f3d44
Merge Vortex 2.2
2024-06-22 23:55:01 -04:00
Jaewon Lee
862997fc94
Virtual Memory Support
2024-06-19 01:52:22 -04:00
Jaewon Lee
62673b4b72
Update upload and download function in simx runtime
2024-06-19 01:43:11 -04:00
Jaewon Lee
cfcece940e
Merge Austin's code (Preliminary)
2024-06-19 01:36:26 -04:00
Blaise Tine
f8ef570778
riscv tests refactoring
2024-05-28 10:46:31 -07:00
Blaise Tine
5ea10fd872
minor update
2024-04-30 22:47:59 -07:00
Blaise Tine
db0f0fd353
runtime API refactoring to support memory reservation and protection
2024-04-28 04:23:00 -07:00
Blaise Tine
f1522e68f8
simx memory coalescing support
2024-03-14 12:20:39 -07:00
Blaise Tine
840ced22a9
simx refactoring - emulation vs simulation discrete separation
2024-03-12 00:23:42 -07:00
Blaise Tine
b0b7cd2b1e
minor updates
2024-02-03 19:09:53 -08:00
Blaise Tine
e217bc2c23
adding tracking for SFU stalls
2023-12-28 12:12:11 -08:00
Blaise Tine
4b68235389
fixed simx dispatcher bug
2023-11-27 04:50:55 -08:00
Blaise Tine
d47cccc157
Vortex 2.0 changes:
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+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
2023-10-19 20:51:22 -07:00
Blaise Tine
5825b7c15a
dram simulator fix
2021-12-07 22:44:06 -05:00
Blaise Tine
b741807f8c
using ramulator dram simulator
2021-12-06 01:22:45 -05:00
Blaise Tine
189cec3ca2
minor update
2021-12-01 10:36:50 -05:00
Blaise Tine
092ff42ab4
simx multicore fix
2021-12-01 00:12:16 -05:00
Blaise Tine
2a7a4df342
simx directory name fix
2021-11-30 07:17:58 -05:00
