7143 commits

This branch

This branch

All branches

Author	SHA1	Message	Date
Yannick Casamatta	505b9b727d	Fix NonImdempotent and speculation condition on WAIT_OBI (#2482)	2024-08-30 16:08:45 +02:00
Yannick Casamatta	2a0e8119a7	fix synth FPGA: obi_default_cfg is not a valid constant function call	2024-08-27 17:02:05 +02:00
Casamatta Yannick	0183aa1ea3	Update synth job to put log in artifact even in case of failure	2024-08-27 17:02:05 +02:00
Yannick Casamatta	df294faf11	sync with pulp/obi PR#12	2024-08-27 17:02:05 +02:00
Yannick Casamatta	ce22b73d87	flist add vendorized obi references	2024-08-27 17:02:05 +02:00
Yannick Casamatta	ad2a053672	flist remove obi submodule references	2024-08-27 17:02:05 +02:00
Yannick Casamatta	f75ab7f5cd	split struct and type definition to allow parameterized types	2024-08-27 17:02:05 +02:00
Yannick Casamatta	2b15b4391d	Vendorize pulp OBI specs at tag v0.1.3	2024-08-27 17:02:05 +02:00
Yannick Casamatta	16b13c929a	remove obi submodule	2024-08-27 17:02:05 +02:00
Yannick Casamatta	04c6232da9	fix obi issue when req is granted with delay	2024-08-27 17:02:05 +02:00
Yannick Casamatta	37f1c45613	move cacheable region check from icache to frontend and manage it in OBI protocol	2024-08-27 17:02:05 +02:00
Yannick Casamatta	da20d9e585	icache: code cleaning	2024-08-27 17:02:05 +02:00
Yannick Casamatta	3fc110cece	icache: allow abort virtual request (index) with a new request ... no need to send kill_req	2024-08-27 17:02:05 +02:00
Akiho Kawada	bd71e7eb29	Feat: add add cva6_hpdcache_icache_if_adapter (supports the simplified icache kill mechanism) (#2269)	2024-08-27 17:02:05 +02:00
Anouar	ffddc147c1	OBI Agent and assertions integration (#2257)	2024-08-27 17:02:05 +02:00
Yannick Casamatta	08ae18c04d	Prepare struct for OBI protocol between LSU and Dcaches	2024-08-27 17:02:05 +02:00
Yannick Casamatta	4c773c3432	fix icache combi loop	2024-08-27 17:02:05 +02:00
Yannick Casamatta	bd38b854be	OBI protocol between Frontend to icache (#2205)	2024-08-27 17:02:05 +02:00
JeanRochCoulon	c5edbda2d7	fix #2464: exception is not generated when INHIBIT CSR is accessed (#2468)	2024-08-27 17:02:05 +02:00
valentinThomazic	7d0cd1ccab	do not use tandem on test suites in ci (#2463)	2024-08-27 17:02:05 +02:00
Côme	d606eeb8b8	Increase code coverage on second ALU by removing branch logic (#2362)	2024-08-27 17:02:05 +02:00
Côme	064cec2066	fix missing ZCMP condition in commit stage to increasse Code Coverage (#2459)	2024-08-24 11:48:36 +02:00
Côme	4c36aafaf0	fix CI (#2460) ... * fix .gitlab-ci.yml * Update report_tandem.py	2024-08-23 11:34:17 -04:00
EasyIP2023	37b58243fa	docs: expand wy-nav-content width to edge of screen (#2452)	2024-08-22 18:10:19 +02:00
valentinThomazic	28affa2346	[CI] use spike tandem on smoke-tests (#2438)	2024-08-22 17:04:48 +02:00
Côme	76e5b40961	fix single-step which was x in cv32a65x config and fix mcycle for double commit (#2369)	2024-08-22 12:03:20 +02:00
dependabot[bot]	12f41b52ac	Bump verif/core-v-verif from e06bd57 to 628ba12 (#2456)	2024-08-20 08:37:35 +02:00
André Sintzoff	051ba348f9	spyglass: remove WRN_1024 warnings (#2448)	2024-08-19 15:44:30 +02:00
Zbigniew Chamski	89eb77a249	[Spike tandem] Fix Yaml config files for CV32A65X. Fix Questa tandem. Add workaround for AXI end-of-test asserts. (#2436)	2024-08-19 11:09:32 +02:00
André Sintzoff	834e3e74d5	spyglass: ignore some multiple assignment W415a warnings (#2446)	2024-08-14 14:17:38 +02:00
JeanRochCoulon	d2889fa174	Display number of cycles at test termination (#2443) ... Reported by RVFI_tracer module	2024-08-13 17:12:13 +02:00
André Sintzoff	e5618977d1	spyglass: move assignments in if clause as only used there (#2444)	2024-08-13 17:11:10 +02:00
Guillaume Chauvon	4f45b575aa	Add ariane_peripherals and testharness to fpga_filter (#2445)	2024-08-13 16:18:11 +02:00
Jalali	9b576c1200	Configure uvm scoreboard to fix 64 issue (#2440)	2024-08-13 09:16:54 +02:00
André Sintzoff	af4e3744d4	spyglass: remove useless assignments (#2439)	2024-08-12 15:06:39 +02:00
MarioOpenHWGroup	4b51643826	TANDEM Configuration fixes (#2420)	2024-08-09 12:34:40 +02:00
valentinThomazic	7435cb310e	fix Spyglass job falsely reporting fail (#2435)	2024-08-07 12:12:38 +02:00
André Sintzoff	3059b1cb25	update riscv-isa-manual to riscv-isa-release-5ddbdd678-2024-08-01 (#2434) ... since last riscv-isa-manual update (CVA6 commit 0bd8b8693)	2024-08-07 11:52:07 +02:00
xiaoweish	0c60bc6e3d	Add debug_test to cva6 (#2339)	2024-08-02 08:50:50 +02:00
JeanRochCoulon	ce4b25c51a	[HOT FIX] fix is_inside_execute (#2429) ... fix #2385	2024-08-02 08:42:11 +02:00
JeanRochCoulon	14fd617455	Fix expected_synth.yml (#2428) ... Difficult to adjust it all the time !	2024-08-02 06:47:03 +02:00
Jalali	2e0a202440	Add check CSR counter in UVM scoreboard (#2427)	2024-08-02 00:20:47 +02:00
Asmaa Kassimi	12be3adb81	Solve some of W240 and W415a warnings increased by PMP entries (#2415)	2024-08-01 18:43:13 +02:00
Guillaume Chauvon	81671e39fa	Fixes and Update CVXIF non regression tests, regression and TB (#2424)	2024-08-01 16:06:24 +02:00
dependabot[bot]	6269f72b63	Bump verif/core-v-verif from bd42aee to e06bd57 (#2422)	2024-07-30 15:09:37 +02:00
Asmaa Kassimi	d4b62d7372	automate lint check process (#2414)	2024-07-30 09:22:13 +02:00
Zbigniew Chamski	4e9abb284c	[cv32a65x] Remove unsupported Zifencei from riscv-config ISA string. (#2419)	2024-07-30 09:20:33 +02:00
dependabot[bot]	bed9a17880	Bump verif/core-v-verif from 1e7f049 to bd42aee (#2418)	2024-07-30 07:08:21 +02:00
Zbigniew Chamski	8dcdf8fb56	[riscv-config] Add memory map entry to platform schema and to CV32A65X platform spec. (#2411)	2024-07-26 23:50:51 +02:00
slgth	6a649d6515	docs: more fixes (#2412)	2024-07-26 23:49:41 +02:00