msfschaffner
8468544156
Misc majurity fixes ( #125 )
...
* Fix latch and timing loop in debu_req
* Fix unconnected IPI signals in CLINT, and unconnected regs in CSR_REGFILE
* Fix several issues with AXI IDs in axi_adapter, add AXI ID width parameter, and assertions testing for invalid read/write data
* Eliminate sim, simc make targets for Questa. Tests can be directly invoked via typing name and optionally specifying the gui-mode.
* Initialize instruction traced shadow regfile to zero at start of simulation
Fix progbuf offsets and tie unsupported counters to zero to avoid propagation of X
Fix printouts of assertions
Modify bootrom to prevent assignment of X to output
* Make separate CI target for AMO tests
* Bump fpga-support version
* Add AMO tests list
* Fix FPU submodule version
* Change core_id + cluster_id into hart_id
* Rename gitlab CI tests
* Replace all SYNTHESIS macros with pragma translate_off
* Update readme, bump common cells, benderize
* Fix torture make target
* Remove unneeded signal
2018-10-17 11:57:18 +02:00
Stefan Mach
891579aaab
⬆️ Bump FPU and add divsqrt CSR
2018-10-10 21:19:34 +02:00
Stefan Mach
a3fd6f7a85
🔧 Fix Bender.yml
2018-09-24 19:04:09 +02:00
Florian Zaruba
bbe1b0800f
Merge branch 'ariane_next' into fpnew
2018-09-24 17:59:35 +02:00
Florian Zaruba
f405a42e36
Fix problem in Bender.yml
2018-09-18 14:42:31 +02:00
Florian Zaruba
cc1007fb76
Fix regfile
2018-09-18 14:37:37 +02:00
Florian Zaruba
9d1f6b1b76
Fix multi-hart debug issues
2018-09-14 10:57:48 +02:00
Florian Zaruba
39a8935d55
Merge branch 'ariane_next' into fpnew
2018-09-13 18:21:49 +02:00
Michael Schaffner
81cd0479a2
Bump axi_node version
2018-09-13 17:54:07 +02:00
Michael Schaffner
8461b27dd5
Update submodules common_cells and axi_node
2018-09-13 17:54:07 +02:00
Florian Zaruba
854d143932
Merge remote-tracking branch 'origin/ariane_next' into fpnew
2018-09-11 18:48:33 +02:00
Florian Zaruba
0d0f2682b8
Split frontend modules to separate files
2018-09-11 18:34:25 +02:00
Florian Zaruba
db846a6c75
Merge remote-tracking branch 'origin/ariane_next' into fpnew
2018-09-11 12:00:48 +02:00
Michael Schaffner
38a42055c1
change fifo module names to fifo_v2 to stay compatible with common_cells submodule
2018-08-27 15:04:39 +02:00
Michael Schaffner
cca0d66fab
switch to common_cells repo, remove redundant files, cleanup + benderize
2018-08-24 16:22:49 +02:00
Florian Zaruba
238dbf8f04
Merge remote-tracking branch 'origin' into ariane_next
2018-08-21 20:22:31 -07:00
msfschaffner
8f0b388ecb
⚡ Cache hierarchy and LSU load unit optimizations
...
* ♻️ restructure hierarchy (move dcache out into ariane/std_cache_subsystem)
* update uvm-components submodule
* ♻️ switch to newer (and better) fifo implementation. redesign of lsu_arbiter to improve on timing.
* ♻️ restructure hierarchy (move dcache out into ariane/std_cache_subsystem)
* ♻️ move icache out to cache_subsystem. connect icache performance counter.
* ♻️ code cleanup
* ♻️ rewrote sign extension mux to decrease comb. delay
* provision additional logic for FLW, FLH, FLB in load_unit
* code cleanup, add efficient RR arbiter with lookahead capability
* change portnames in ariane_wrapped.sv for verilator TB
2018-08-18 11:03:09 -07:00
Florian Zaruba
ddd68fd39a
Merge remote-tracking branch 'origin/riscv-compliant-debug' into fpnew
2018-07-31 21:28:38 -07:00
Florian Zaruba
064c0a0ac7
🔥 Remove legacy if stage
2018-08-01 02:59:08 +02:00
Florian Zaruba
b21e43bc21
👾 Fix synthesis warning, update debug files
2018-07-31 01:12:18 +02:00
Florian Zaruba
23037ff55f
👾 Fix timing loop and unpacked assign
2018-04-18 18:53:18 +02:00
Fabian Schuiki
645dcfcb6e
Remove regfile_ff from bender file
...
Both `ariane_regfile.sv` and `ariane_regfile_ff.sv` define a module
`ariane_regfile.sv`. Drop the latter.
2018-03-16 16:37:17 +01:00
Florian Zaruba
e662606cdb
Add new regfiles to Bender
2018-03-16 13:29:46 +01:00
Florian Zaruba
a712ad8afc
Remove potential collisions on regfile
2018-03-16 13:18:15 +01:00
Florian Zaruba
9ed38d1a83
Benderize ariane src_files
2018-03-14 10:44:22 +01:00
Florian Zaruba
62fffe6a9a
Add correct dependencies
2018-03-06 17:20:47 +01:00
Florian Zaruba
30b1e5f464
Add option parsing to verilator environment
2018-02-01 18:52:03 +01:00
