* docs: spec_builder.py: add missing extensions
* docs: fix unpriv manual (opcode map, Zcmop)
* in opcode map, write not used when corresponding extension is disabled
* use correct condition for Zcmop extension
* docs: remove PMP chapter when no PMP
* docs: add tailored RISC-V ISA manual for CV32A60X configuration
Co-authored-by: JeanRochCoulon <jean-roch.coulon@thalesgroup.com>
This PR adds a new two-level BHT predictor with private history. The new BPType parameters allow choosing between the original BHT and the new one.
Co-authored-by: Gianmarco Ottavi <ottavig91@gmail.com>
Since last riscv-isa-manual update (CVA6 commit 67a6ae966):
- minor documentation changes
- new unsupported Zsmctr extension
- add missing asciidoctor-lists gem in dependencies/Gemfile
Gemfile update is needed for ReadTheDocs
Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>
Co-authored-by: JeanRochCoulon <jean-roch.coulon@thalesgroup.com>
Both the ISA and design documentations use some parameters generated from the RTL (ports, parameters).
As of now, they are committed to the repository and can be out of sync with the code.
This PR removes them from the repository and freshly generates them from the code when building HTML files.
This PR also removes prebuilt HTML files (design & ISA docs) and generates them when building the top-level Read the Docs documentation (make -C docs).
