15 commits

Author	SHA1	Message	Date
Florian Zaruba	a5f3184a65	Improve Tandem Simulation, switch-able caches and fix a cache-bug (#192) ... * Add spike isa sim * Fix AMO problem in verilator * 🎨 Tidy up FPU wrapper * Bump axi_exclusive submodule * Refactor serpent AXI adapter, bump dbg and atomics submodules, add separate bootrom for linux on OpenPiton (#190) * Refactor serpent AXI adapter * Disable FPU in OpenPiton by default * Bump dbg and atomics submodules * Fix cache testbenches (interface change) * FPGA bootrom changes for OpenPiton SDHC * Introduce two bootroms, one for baremetal apps (pitonstream), and one for linux boot from SD * Testing barrier-based synchronisation instead of CLINT-based * This bootrom works for 2 core on g2 and if you change MAX_HARTS to 4, then 4 cores on vc707 * Add MAX_HARTS switch to makefile * Fix gitlab CI * Revert standard FPGA bootrom * Update Flist * Make UART_FREQ a parameter * Fix typo in tb.list and an error in define switch in ariane_pkg * Copy over SD-driver in bootloader from @leon575777642 * Fix compilation issues of bootrom * Change signal name in serpent periph portlist * Correct generate statement in serpent dcache memory * Add Piton SD Controller, FPGA fixes * Fix race condition in dcache misshandler * Add tandem spike to Make flow * Remove OpenPiton SD Card controller again	2019-03-18 11:51:58 +01:00
Florian Zaruba	785577d37a	🐛 Fix reset strategy in TB	2018-11-23 19:04:37 +01:00
Florian Zaruba	0ce36534e8	Add support for VCU118	2018-11-12 16:56:06 +01:00
Florian Zaruba	66b0deb06a	Update bootrom	2018-11-07 17:00:46 +01:00
Florian Zaruba	64eb9d8625	Improve Spike alignment	2018-11-05 01:24:10 +01:00
Florian Zaruba	1b1b4a4d23	Fix SEIP and device tree uart speed	2018-10-31 15:26:51 +01:00
Florian Zaruba	2bda00a1a9	Adapt DTS	2018-10-30 16:19:35 +01:00
Florian Zaruba	089c796d76	Small RTL fixes	2018-10-16 13:57:46 +02:00
Florian Zaruba	0c8eb5a52e	Fix PLIC address map and DTS	2018-10-10 17:23:03 +02:00
Florian Zaruba	eab01511a3	Linux booting to first context switch	2018-09-29 13:46:03 +02:00
Florian Zaruba	257d017abb	FPGA mapping working on Genesys 2	2018-09-27 12:02:23 +02:00
Florian Zaruba	0ae3fb5ebb	Clean-up and fpga preparataion ... - fix CDC - Bump repo versions - Fix interface issue with bypassed read/writes	2018-09-14 10:50:25 +02:00
Florian Zaruba	929ef3bb54	Update device tree and fix possible LSU deadlock	2018-08-02 02:02:47 +02:00
Florian Zaruba	72d62f93e6	Include basic device tree for standalone simulation	2018-08-01 00:34:23 -07:00
Florian Zaruba	8700b04af9	Add bootrom sw from rocket-core	2018-07-10 12:00:41 -07:00