cva6/docs
André Sintzoff cbb08e8d19
Some checks are pending
bender-up-to-date / bender-up-to-date (push) Waiting to run
ci / build-riscv-tests (push) Waiting to run
ci / execute-riscv64-tests (push) Blocked by required conditions
ci / execute-riscv32-tests (push) Blocked by required conditions
docs: clarify WLRL CSR fields on CVA6 (fix #1053) (#2733)
as priv-csrs.adoc was not yet tailored for CVA6, the file is copied
and tailored

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>
2025-01-23 16:48:13 +01:00
..
01_cva6_user Adding support for Scalar Crypto Extension (Bitmanip instructions for Cryptography, Zbkb) (#2653) 2024-12-18 22:35:41 +01:00
02_cva6_requirements Update cva6_requirements_specification.rst (#2364) 2024-07-12 18:14:26 +02:00
03_cva6_design Mmu design document (#2117) 2024-06-17 09:23:44 +02:00
04_cv32a65x Interrupt agent : Modify README also clean interrupt_pkg (#2571) 2024-11-21 23:59:42 +01:00
05_cva6_apu LINT: Initial changes for Lint warnings removal (#1158) 2023-04-24 08:22:56 +02:00
06_cv64a6_mmu doc: keep documentation in sync with the code (#2558) 2024-10-25 12:27:09 +02:00
_static docs: expand wy-nav-content width to edge of screen (#2452) 2024-08-22 18:10:19 +02:00
common Design documentation: AsciiDoc conversion (#2399) 2024-07-25 17:18:27 +02:00
csr-from-ip-xact doc: update MVENDORID CSR value (fix #1735) (#1753) 2024-01-10 11:30:48 +01:00
design Clean up table (#2725) 2025-01-22 08:29:35 +01:00
riscv-isa docs: clarify WLRL CSR fields on CVA6 (fix #1053) (#2733) 2025-01-23 16:48:13 +01:00
scripts update riscv-isa-manual to riscv-isa-release-4f277ff-2025-01-17 (#2717) 2025-01-21 09:56:51 +01:00
user_guide doc: Add cva6_ug_csr.adoc (#817) 2022-02-07 15:01:52 +01:00
.gitignore doc: keep documentation in sync with the code (#2558) 2024-10-25 12:27:09 +02:00
conf.py docs: expand wy-nav-content width to edge of screen (#2452) 2024-08-22 18:10:19 +02:00
index.rst Design documentation: AsciiDoc conversion (#2399) 2024-07-25 17:18:27 +02:00
Makefile doc: keep documentation in sync with the code (#2558) 2024-10-25 12:27:09 +02:00
README.md doc: keep documentation in sync with the code (#2558) 2024-10-25 12:27:09 +02:00
requirements.txt docs/requirements.txt: add missing packages for RTD (#2726) 2025-01-22 09:07:01 +01:00

CVA6 documentation

CVA6 documentation is published as a Read the Docs documentation. It can be generated by running make in this directory. This generates all necessary sub-documents.

Configuration-specific manuals

For each supported target (e.g. cv32a65x), there are two manuals included in the main documentation: a tailored RISC-V instruction set manual, and a design documentation. These documents are generated when building the main documentation.

Instruction set manual

Instruction set manuals (privileged & unprivileged) are based on the official RISC-V Instruction Set Manual repository. Some parts are stripped down or annotated to only include what's relevant for each specific configuration.

These manuals can be manually generated with: make -C 04_cv32a65x/riscv priv-html unpriv-html. Replace 04_cv32a65x with the desired target. Some of the files used in this documentation (config.adoc) are directly generated from the RTL.

Design documentation

Design documentation describes the internal architecture of the CVA6 processor.

It can be manually generated with: make -C 04_cv32a65x/design design-html. Some of the files used in this documentation (config.adoc, parameters.adoc, port_*.adoc, csr.adoc, isa.adoc) are directly generated from the RTL.