* [rtl] Changed the default number of performance counters from 0 to 10 (#214)
* [rtl] Turning debug halt and exception addresses from parameters into signals (#269)
* [doc] Updating the docs regarding the turning of debug halt and exception addresses into signals (#269)
* Adding buildsim.log to .gitignore, as it is created by some make targets
* remove parameter BranchPredictor
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Remove references to the removed parameter(s) from examples
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from compliance verification
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from core lists
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from the example configurations
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Remove references to the removed parameter from documentation
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Remove related and dead code
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
---------
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
Co-authored-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove parameter option WritebackStage
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from examples
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from compliance verification
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from formal verification code generated for SymbioticEDA
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Remove reference to the deleted parameterd from the documentation
Do not refer to WriteBack as to a stage
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Remove related code to Writeback stage
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Removal of related and dead code after Writeback-stage removal
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* substitute ASSERT macro with one ignoring rst_ni and clk signals
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* keep clk_i and rst_ni for the sake of assert alone
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* BUGFIX: reintroduce en_wb signal between id and wb
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
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Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
Co-authored-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
Remove dead and related code
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
Co-authored-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove BranchTargetALU param.
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from the documentation
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from the example configurations
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from examples
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from compliance verification
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* remove references to the removed parameters from core lists
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
* Remove references to the removed parameter(s) from Yosys framework configuration parser
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
---------
Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
Co-authored-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
This is to allow more consistent signalling in systems that integrate
Ibex (e.g. OpenTitan) so bus integrity errors external to Ibex and one's
detected within Ibex can be fed into the same alert whilst seperating
out Ibex's various internal alert causes.
This commit includes switching to a scrambling RAM primitive for
ICache data and tag RAMs. Also introduces minor changes to ICache
to handle scrambling key valid signal.
It also includes a minor bug fix regarding not initializing
`fill_way_q` signal without ResetAll parameter. When the parameter
is not set and we have our first hit right after ICache enables,
the signal hangs.
Signed-off-by: Canberk Topal <ctopal@lowrisc.org>
Extra bits are added alongside read/write data for the instruction and
data buses to facilitate data integrity checking.
Ibex testbench extended to generate the expected bits.
All other top-levels modified to add the new signals (which are mostly
ignored).
Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
Random constants are sent through the hierarchy as parameters in-line
with other OpenTitan modules.
Further detail on this mechanism can be found in lowrisc/opentitan#2229
Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
This signal used to be a one shot enable out of reset. We need an option
to pause execution for OpenTitan, so fetch_enable is extended to cover
that.
The signal is already driven low by the testbench at the end of test.
This is moved after the performance counter reads to ensure they can
complete.
Fixes#1105
Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
Note that the alert output is tied off for now until an option is added
to reset all registers (otherwise there will be X propagation).
Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
This commit creates a new top level wrapping the core, register file and
icache RAMs. The tracing top level is also renamed to ibex_top_tracing
to match. This new top level is intended to enable a dual core lockstep
implementation of Ibex.
There are no functional changes in this commit, only wiring.
Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
- Document that SecureIbex cannot be used without a multiplier and add
an assertion in the rtl. This fixes#1080.
- Move the PC checking hardware onto its own parameter to match all the
other individual security features.
- Make the PC increment behavior more sensible on fetch errors (and make
it match the icache behavior). Factor this into the PC increment check
to prevent false triggering, fixes#1094.
- Stop the PC mismatch checker firing on dummy instructions, fixes
#1095.
Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
Restructure the existing documentation to group the content by intended
audience. This produces four sections:
* An introduction section, relevant to "newcomers" to Ibex.
* An user guide, intended for hardware designers (integrators) and
software developers who want to integrate Ibex, and develop software
for it.
* A reference guide, which provides background information on the
design. This section is essential when working on Ibex, and also
documents our design decisions.
* A developer guide aimed at people modifying Ibex itself. It consists
mostly of process and tool documentation: how to run the verification
after a code change, how to use GitHub, etc.
This commit is large, but text is mostly unchanged. A couple of
introductions and tables of content were added, but no significant
changes to the text have been made. These will be done in follow-ups.
Signed-off-by: Philipp Wagner <phw@lowrisc.org>