Olof Kindgren
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72e34ce795
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Simplify servant_arbiter
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2019-10-29 21:53:13 +01:00 |
|
Olof Kindgren
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4f32975989
|
Consistent naming of servant components
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2019-10-29 21:53:13 +01:00 |
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Olof Kindgren
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9b5401811e
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servant: Only ignore memfile for verilator
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2019-10-29 21:53:13 +01:00 |
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Olof Kindgren
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57b4fca05f
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Ignore initial garbage in verilator UART decoder
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2019-10-29 21:53:13 +01:00 |
|
Olof Kindgren
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574464a33b
|
De-pipeline alu_result_sel
|
2019-10-29 21:53:13 +01:00 |
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Fabien Marteau
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b9a9e99e2b
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Suppressing some verilator lint warnings
|
2019-10-22 10:53:23 +02:00 |
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Fabien Marteau
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e5061ca5f8
|
Update README.md (#9)
* Update README.md
|
2019-10-22 09:15:35 +02:00 |
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Olof Kindgren
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8bc54a99ad
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Move mcause generation to serv_csr
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2019-09-26 23:36:02 +02:00 |
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Olof Kindgren
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2b5c71fe9b
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Gate mem_rd in mem_if
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2019-09-26 23:31:23 +02:00 |
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Olof Kindgren
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0f767ad2d3
|
Gate mem_misalign in mem_if
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2019-09-26 23:23:42 +02:00 |
|
Olof Kindgren
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5b96b3a938
|
Simplify jump flag
|
2019-09-26 23:12:07 +02:00 |
|
Olof Kindgren
|
7bd89deb41
|
Simplify mret/csr address generation
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2019-09-26 23:09:22 +02:00 |
|
Olof Kindgren
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126937f16a
|
Rewrite RF and state machine
Big patch, but would take more work to split it up
|
2019-09-26 23:09:22 +02:00 |
|
Olof Kindgren
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8481fb46a1
|
Remove dead code
|
2019-09-26 22:59:46 +02:00 |
|
Olof Kindgren
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bad823ff6d
|
Fix syntax error for o_take_branch
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2019-09-26 22:59:46 +02:00 |
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Olof Kindgren
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ca2beaf786
|
Pass rf_rreq through serv_state
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2019-09-26 22:59:46 +02:00 |
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Olof Kindgren
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3d6eb3feca
|
Separate rf_ready and dbus_ack
|
2019-09-26 22:59:46 +02:00 |
|
Florian Zaruba
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27621a285e
|
rtl: Make compatible to Synopsys Design Compiler
Synopysis DC has problems with forward references and initial
statements. Fixed that for better compatibility.
|
2019-09-26 22:57:40 +02:00 |
|
Olof Kindgren
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ec6c7a7cd5
|
Update README
|
2019-09-16 16:57:56 +02:00 |
|
Olof Kindgren
|
920ad92bc7
|
Remove unused rs_en signal
|
2019-09-16 10:45:42 +02:00 |
|
Olof Kindgren
|
6518b5f30f
|
Simplify bufreg_hold
|
2019-09-16 09:05:47 +02:00 |
|
Olof Kindgren
|
ef7706f26b
|
Simplify two-stage signalling
|
2019-09-16 09:03:02 +02:00 |
|
Olof Kindgren
|
d4c782bce6
|
Set o_dbus_we directly from decode
|
2019-09-16 00:13:21 +02:00 |
|
Olof Kindgren
|
b9e410a0a0
|
Remove bytepos from serv_mem_if
|
2019-09-16 00:07:58 +02:00 |
|
Olof Kindgren
|
5a44634ee5
|
Avoid exposing funct3 from decode
|
2019-09-15 23:50:02 +02:00 |
|
Olof Kindgren
|
9575eb4fef
|
Separate decode and state
|
2019-09-15 23:25:10 +02:00 |
|
Olof Kindgren
|
7289a68f6e
|
Separate state from o_bufreg_loop
|
2019-09-14 22:52:41 +02:00 |
|
Olof Kindgren
|
c0a177aebe
|
Simplify o_alu_cmp_uns
|
2019-09-14 22:21:25 +02:00 |
|
Olof Kindgren
|
1248043a39
|
Separate state and decode from CSR signals
|
2019-09-14 22:18:03 +02:00 |
|
Olof Kindgren
|
ef3fc9274d
|
Rename misleading signal names
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
8c63a1a22f
|
Simplify bufreg.i_clr
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
8dc137fb07
|
Kill of mem_init and mem_en
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
e20e0eef8f
|
Optimize dbus_cyc
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
8cd9742b53
|
Use two write ports for RF/CSR RAM
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
a0ba84096a
|
Simplify csr stuff
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
7425128dd8
|
Pass imm offsets through bufreg
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
28a2bbdb60
|
Rename misleading signal name
|
2019-09-13 23:30:46 +02:00 |
|
Olof Kindgren
|
286a07bfc8
|
Mask rvfi_valid during reset release
|
2019-09-13 23:30:45 +02:00 |
|
Olof Kindgren
|
e059b7cf09
|
Add timeout argument
|
2019-08-25 22:52:34 +02:00 |
|
Olof Kindgren
|
65eb89323a
|
Replace wb_ram with servant_ram
|
2019-08-25 22:51:50 +02:00 |
|
Olof Kindgren
|
d2cf7e547a
|
Interrupt refactoring
|
2019-08-25 22:47:29 +02:00 |
|
Olof Kindgren
|
3c1582b7b2
|
Remove unused RVFI defines
|
2019-08-14 22:15:45 +02:00 |
|
Olof Kindgren
|
892388627c
|
Speed up memory accesses
|
2019-08-14 22:15:45 +02:00 |
|
Olof Kindgren
|
f754fffdac
|
Make default target runnable
|
2019-07-29 08:41:03 +02:00 |
|
Olof Kindgren
|
71a1abe602
|
Add missing RVFI port
|
2019-07-23 13:03:12 +02:00 |
|
Olof Kindgren
|
fb7c6c1458
|
Simplify csr_en logic
|
2019-07-23 12:10:38 +02:00 |
|
Olof Kindgren
|
31852f175d
|
Simplify alu_cmp_eq control logic
|
2019-07-23 12:10:38 +02:00 |
|
Olof Kindgren
|
af3b82f9ac
|
Optimize take_branch condition
|
2019-07-23 12:10:38 +02:00 |
|
Olof Kindgren
|
88b199a97c
|
Fix typo in service reset signal
|
2019-07-22 22:56:27 +02:00 |
|
Olof Kindgren
|
16c93a58ee
|
Move mepc and mtval into RF memory
|
2019-07-08 07:49:58 +02:00 |
|