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cva6/corev_apu/altera
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AngelaGonzalezMarino 6e0cf8d730
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Altera fpga update (#2790) 
Update Altera APU design to support linux in both 32 and 64 bits
* Move JTAG UART inside peripherals to properly connect the interruput request to PLIC
* Reduce the frequency of operation to 100MHz to avoid timing issues in 64bit version
* Update UART read and write operation in bootrom to allow keyboard interrupt
2025-02-25 22:12:55 +01:00
..
constraints Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
ip Altera fpga update (#2790) 2025-02-25 22:12:55 +01:00
src Altera fpga update (#2790) 2025-02-25 22:12:55 +01:00
altera.cfg Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
io_standard_constraints.csv Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
ip_files.csv Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
loc_constraints.csv Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
Makefile Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
search_paths.csv Altera flow support (#2649) 2025-01-07 23:45:49 +01:00
settings.csv Altera flow support (#2649) 2025-01-07 23:45:49 +01:00