JeanRochCoulon
3cbe0e0de9
Revert "Multicommits to shorten smoke-tests duration, to declare VLEN as para…"
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This reverts commit 0877e8e446
2024-10-23 18:07:47 +02:00
JeanRochCoulon
0877e8e446
Multicommits to shorten smoke-tests duration, to declare VLEN as parameter, to improve coremark results, to implement spike.yaml/linker dedicated to 65x ( #2563 )
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- FIX: Replace riscv_pkg:VLEN by CVA6Cfg.VLEN
- Declare VLEN as new CVA6 parameter
- smoke-hwconfig: run with vcs-uvm and use return0 tests to speed-up CI light stage timing execution
- Use dedicated linker scripts for 65x configuration.
- Use dedicated spike.yaml for 65x configuration.
- Set BHTEntries=128, cache=WT, scoreboard entries=8 to improve Coremark and Dhrystone results
- Run 4 iterations of coremark to improve results
2024-10-23 17:56:06 +02:00
Côme
c1c2f9d922
ci: print results in job logs ( #2561 )
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bender-up-to-date / bender-up-to-date (push) Waiting to run
ci / build-riscv-tests (push) Waiting to run
ci / execute-riscv64-tests (push) Blocked by required conditions
ci / execute-riscv32-tests (push) Blocked by required conditions
This modification allows:
- printing the results in the terminal
- running the script from the terminal (without the environment variables from CI)
The yaml report is only built in CI, but the results are always printed.
2024-10-22 19:03:46 +02:00
JeanRochCoulon
c8f2c39e48
Use uvm testbench to run gate simulations ( #2548 )
bender-up-to-date / bender-up-to-date (push) Waiting to run
ci / build-riscv-tests (push) Waiting to run
ci / execute-riscv64-tests (push) Blocked by required conditions
ci / execute-riscv32-tests (push) Blocked by required conditions
2024-10-16 07:08:59 +02:00
JeanRochCoulon
7ae870e02f
cv32a65x CI: Enlarge cache to increase bench result and switch from -O3 to -Os compiler option ( #2541 )
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* .gitlab-ci.yml: Enlarge cv32a65x cache size
* Dhrystone_smoke.sh: switch from -O3 to -Os option
2024-10-11 09:42:37 +02:00
Jean-Roch Coulon
b744f9bb09
Create job dedicated to benchmark CVA6
2024-10-08 21:14:33 +02:00
JeanRochCoulon
08c81658ec
Display report at the end of dhrystone and coremark executions ( #2529 )
2024-10-04 17:52:06 +02:00
jzthales
6ccd8d8bfa
Refactor forwarding in issue_stage module ( #2519 )
2024-10-01 06:13:30 +02:00
JeanRochCoulon
56532c6963
Simplify CI ( #2517 )
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Modify CI to always check with Tandem and promote UVM TB use
2024-09-27 10:01:46 +02:00
André Sintzoff
6561f2c641
report_benchmark.py: fix Dhrystone cycles after PR #2484 ( #2488 )
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after commit 111df66
2024-09-02 16:39:12 +02:00
dependabot[bot]
ea3a55450b
Bump core/cache_subsystem/hpdcache from 25ffa34 to b4519e7 ( #2466 )
2024-08-31 08:51:52 +02:00
Côme
0d2097be0c
Fix minstret ( #2471 )
2024-08-28 10:54:52 +02:00
Côme
339d3dd851
Increase code coverage on second ALU by removing branch logic ( #2362 )
2024-08-26 17:32:24 +02:00
Côme
4c36aafaf0
fix CI ( #2460 )
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* fix .gitlab-ci.yml
* Update report_tandem.py
2024-08-23 11:34:17 -04:00
valentinThomazic
28affa2346
[CI] use spike tandem on smoke-tests ( #2438 )
2024-08-22 17:04:48 +02:00
valentinThomazic
7435cb310e
fix Spyglass job falsely reporting fail ( #2435 )
2024-08-07 12:12:38 +02:00
JeanRochCoulon
14fd617455
Fix expected_synth.yml ( #2428 )
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Difficult to adjust it all the time !
2024-08-02 06:47:03 +02:00
Asmaa Kassimi
12be3adb81
Solve some of W240 and W415a warnings increased by PMP entries ( #2415 )
2024-08-01 18:43:13 +02:00
Asmaa Kassimi
d4b62d7372
automate lint check process ( #2414 )
2024-07-30 09:22:13 +02:00
Moritz Schneider
fd489a16fb
Fix off by one error in PMP length ( #2394 )
2024-07-25 12:08:53 +02:00
Côme
4ff16f9da3
set WtDcacheWbufDepth to 8 ( #2390 )
2024-07-24 23:54:26 +02:00
valentinThomazic
d4809a7e2b
change required dhrystone cycles count value ( #2386 )
2024-07-23 17:55:43 +02:00
Côme
4a223bee46
decorrelate instr and addr depths in IQ ( #2375 )
2024-07-22 14:22:56 +02:00
Guillaume Chauvon
8fa590b5c3
CVXIF 1.0.0 ( #2340 )
2024-07-12 10:53:18 +02:00
Côme
5fcc39dbee
remove round interval ( #2353 )
2024-07-11 17:35:03 +02:00
Côme
2dcb7417b4
make cv32a65x superscalar ( #2348 )
2024-07-10 23:33:49 +02:00
Moritz Schneider
6044454a07
Fix index calculation for PMPCFG CSR write logic ( #2330 )
2024-07-05 22:56:27 +02:00
Asmaa Kassimi
67dba2cad3
condition csr_regfile.sv ( #2310 )
2024-07-05 14:14:01 +02:00
Asmaa Kassimi
ace1643e91
Add lambda function to sort lint summary according to severity ( #2316 )
2024-07-03 16:46:30 +02:00
Côme
ce1e889716
update expected area ( #2299 )
2024-06-28 15:02:58 +02:00
Cesar Fuguet
9df64701bd
Update submodule core/cache_subsystem/hpdcache ( #2265 )
2024-06-18 11:54:35 +02:00
JeanRochCoulon
cb6211bbb8
Remove cv32a6_embedded configuration ( #2246 )
2024-06-14 08:30:17 +02:00
AngelaGonzalezMarino
8164828913
Fix instruction realign when C extension is not used ( #2241 )
2024-06-13 11:17:25 +02:00
JeanRochCoulon
2266f75f2d
MTVAL is read-only zero when TvalEn = 0 ( #2231 )
2024-06-11 11:22:41 +02:00
JeanRochCoulon
7ccf82ce76
Add param to enable/disable Zihpm and Zicntr extensions for 65x ( #2208 )
2024-06-10 15:14:03 +02:00
Jalali
278649d3ed
Update coverage script after exclude HPDcache module ( #2197 )
2024-06-05 09:55:48 +02:00
Guillaume Chauvon
a5152b03a5
Add support for cv32a65x dedicated synthesis ( #2178 )
2024-06-04 10:58:09 +02:00
Jalali
8e2393db99
Add the capability to add functional coverage results into the dashboard ( #2183 )
2024-06-03 11:47:22 +02:00
Côme
93648e8cf7
Revert "Functional coverage report in CI ( #2127 )" ( #2168 )
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This reverts commit d4f984dbce
2024-05-30 10:37:56 +02:00
Asmaa Kassimi
6164ecbae2
Create Spyglass CI job and add Spyglass folder to cva6 repository ( #2131 )
2024-05-24 14:16:15 +02:00
Jalali
26e6a8de4e
HOTFIX: update HVP & CC report script to solve an error in CC JOb ( #2139 )
2024-05-21 21:32:08 +02:00
Jalali
d4f984dbce
Functional coverage report in CI ( #2127 )
2024-05-17 22:58:52 +02:00
JeanRochCoulon
f4ec364bf4
Fix MIE CSR described in #2004 and #2008 Github issue ( #2017 )
2024-04-08 19:54:55 +02:00
valentinThomazic
5c7ddcbcc5
Fix log naming and dashboard improvements ( #2001 )
2024-04-03 18:03:47 +02:00
valentinThomazic
fd12ee596c
Add smoke-tests and fpga logs on dashboard ( #1928 )
2024-03-14 14:43:56 +01:00
André Sintzoff
8c2bbb0527
cva6.py: fix typos in displayed messages ( #1906 )
2024-03-08 14:01:19 +01:00
valentinThomazic
fb86e7a5ac
Mark job as failed when build fails ( #1891 )
2024-03-05 17:57:32 +01:00
Yannick Casamatta
1dec79464e
add csr in rvfi ( #1833 )
2024-02-24 00:10:23 +01:00
André Sintzoff
71f57a38c2
csr_regfile.sv: no MENVCFG[H], MCOUNTEREN when no User mode ( fix #1843 ) ( #1861 )
2024-02-21 18:16:35 +01:00
JeanRochCoulon
de5d0d7ed4
cv32a65x ( #1799 )
2024-02-01 13:11:45 +01:00
