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Introduction This PR adds support for Zbkb extension in the CVA6 core. It also adds the documentation for this extension. These changes have been tested with self-written single instruction tests and with the riscv-arch-tests. This PR will be followed by other PRs that will add complete support for the Zkn - NIST Algorithm Suite extension. Implementation Zbkb Extension: Added support for the Zbkb instruction set. It essentially expands the Zbb extension with additional instructions useful in cryptography. These instructions are pack, packh, packw, brev8, unzip and zip. Modifications 1. A new bit ZKN was added. The complete Zkn extension will be added under this bit for ease of use. This configuration will also require the RVB (bitmanip) bit to be set. 2. Updated the ALU and decoder to recognize and handle Zbkb instructions. Documentation and Reference The official RISC-V Cryptography Extensions Volume I was followed to ensure alignment with ratification. The relevant documentation for the Zbkb instruction was also added. Verification Assembly Tests: The instructions were tested and verified with the K module of both 32 bit and 64 bit versions of the riscv-arch-tests to ensure proper functionality. These tests check for ISA compliance, edge cases and use assertions to ensure expected behavior. The tests include: pack-01.S packh-01.S packw-01.S brev8-01.S unzip-01.S zip-01.S |
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| .. | ||
| images | ||
| AXI_Interface.rst | ||
| Compiler_Command_Lines.rst | ||
| Core_Integration.rst | ||
| CSR_Cache_Control.rst | ||
| CSR_CV32A60AX.rst | ||
| CSR_CV32A60AX_list.rst | ||
| CSR_CV32A60X.rst | ||
| CSR_CV32A60X_list.rst | ||
| CSR_CV64A6_MMU.rst | ||
| CSR_CV64A6_MMU_list.rst | ||
| CSR_Performance_Counters.rst | ||
| Custom_Instructions.rst | ||
| CV32A6_Control_Status_Registers.rst | ||
| CV64A6_Control_Status_Registers.rst | ||
| CVA6_user_guide.rst | ||
| CVX_Interface_Coprocessor.rst | ||
| index.rst | ||
| Interfaces.rst | ||
| Introduction.rst | ||
| Parameters_Configuration.rst | ||
| PMA.rst | ||
| PMP.rst | ||
| Programmer_View.rst | ||
| RISCV_Instructions.rst | ||
| RISCV_Instructions_RV32A.rst | ||
| RISCV_Instructions_RV32C.rst | ||
| RISCV_Instructions_RV32I.rst | ||
| RISCV_Instructions_RV32M.rst | ||
| RISCV_Instructions_RV32ZCb.rst | ||
| RISCV_Instructions_RVZba.rst | ||
| RISCV_Instructions_RVZbb.rst | ||
| RISCV_Instructions_RVZbc.rst | ||
| RISCV_Instructions_RVZbkb.rst | ||
| RISCV_Instructions_RVZbs.rst | ||
| RISCV_Instructions_RVZcmp.rst | ||
| RISCV_Instructions_RVZicond.rst | ||
| RISCV_Instructions_RVZicsr.rst | ||
| RISCV_Instructions_RVZifencei.rst | ||
| rtype_format.png | ||
| Traps_Interrupts_Exceptions.rst | ||
| user_cfg_doc.rst | ||
