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11027 commits

Author SHA1 Message Date
David Harris
85e282065e
Merge pull request #1368 from jordancarlin/pre-commit-fix
Fix pre-commit setup
2025-04-17 13:08:19 -07:00
Jordan Carlin
f284d864f7
Fix pre-commit setup 2025-04-17 13:06:59 -07:00
Jordan Carlin
3909540b78
Merge pull request #1366 from davidharrishmc/dev
Cleaned up HPTW reset
2025-04-17 11:31:07 -07:00
David Harris
ae2846b1ec Cleaned up HPTW reset 2025-04-17 11:22:17 -07:00
David Harris
ed93cca5f4
Merge pull request #1365 from coreyqh/ccov
Full priv and cacheways code coverage
2025-04-17 09:19:44 -07:00
Corey Hickson
9bc3c7c78c Undo unnecessary tests/coverage additions 2025-04-17 08:09:14 -07:00
Corey Hickson
7c5a5c592c Full decomp code coverage 2025-04-17 03:06:38 -07:00
Corey Hickson
6c651cd73e Full cacheways code coverage 2025-04-17 02:28:20 -07:00
Corey Hickson
f7bc15eb3e Full priv code coverage 2025-04-17 02:05:35 -07:00
David Harris
42f78c645b
Merge pull request #1363 from coreyqh/ccov
Full privdec code coverage
2025-04-15 12:33:16 -07:00
Corey Hickson
91e919395b CSRC full coverage 2025-04-15 11:07:55 -07:00
David Harris
04a8087a1d
Merge pull request #1364 from HamzaYusufJamal/main
sync with changes to riscv-arch-test trap handler
2025-04-15 09:17:16 -07:00
Hamza Jamal
8f2be97dd4 sync with changes to riscv-arch-test trap handler 2025-04-15 09:08:29 -07:00
Corey Hickson
1a3bcc69a6 Full privdec code coverage 2025-04-15 02:47:53 -07:00
Jordan Carlin
d99833ed3d
Merge pull request #1357 from davidharrishmc/dev
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2025-04-14 15:52:31 -07:00
David Harris
81951d59ab Typo fix 2025-04-14 15:51:15 -07:00
David Harris
d57c789c15 Fixed signs printed for fma16 testgen 2025-04-14 15:01:48 -07:00
David Harris
64ff263681 pmpadrdecs.S hits ifu and lsu pmp coverage 2025-04-13 07:16:39 -07:00
David Harris
bdd16f9ddc Changed test path in cvw-arch-verif to match new organization 2025-04-13 06:47:54 -07:00
David Harris
4104b8f003 Exclude PMP access sizes not used by IFU 2025-04-13 04:43:01 -07:00
David Harris
eb88a9e85e Use effective privilege mode in PMP checking 2025-04-13 04:42:35 -07:00
David Harris
93ee64d14a Fixed comments in periph tests 2025-04-13 04:13:13 -07:00
David Harris
a3de429fc9
Merge pull request #1353 from stineje/main
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Exercise 18.5 + EEA Python program
2025-04-12 22:07:21 -07:00
David Harris
4bd855c1a7 added wally32periph to rv32imc regression 2025-04-12 20:54:06 -07:00
David Harris
3101d27d95 Fixed Issue #1321 about wally32periph failing on rv32imc; removed SEIP tests from WALLY-periph-01 and put them in WALY-periph-s 2025-04-12 20:32:51 -07:00
David Harris
556f965757 Removed unused delegation 2025-04-12 20:25:25 -07:00
David Harris
ed67daff9e Comment about when to reinstate arch64priv tests 2025-04-12 19:45:07 -07:00
David Harris
9ff6ac0ad1 Remoed commented out arch32/64priv jalr test no longer in riscv-arch-test 2025-04-12 19:42:25 -07:00
David Harris
e1f79137ee Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2025-04-12 19:37:19 -07:00
David Harris
81ca4db553 Merge branch 'dev' of https://github.com/davidharrishmc/cvw into dev 2025-04-12 19:37:14 -07:00
David Harris
a1000c19ea Checking PMP TOR bound against length of access to fix Wally against the riscv-arch-test pmp64-TOR* tests. Still has known limitation in issue #1354, but passes tests, which are now reenabled 2025-04-12 19:36:59 -07:00
David Harris
31c0b05a0c
Merge pull request #1356 from jordancarlin/tera-buildroot
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Increase buildroot timeout duration for Tera
2025-04-12 18:58:36 -07:00
Jordan Carlin
d13be8592b
Increase buildroot timeout duration for Tera 2025-04-12 18:54:31 -07:00
Jordan Carlin
23607134c4
Merge pull request #1355 from davidharrishmc/dev
Fixed mstatus bits that should be read-only 0 in certain configurations
2025-04-12 18:52:22 -07:00
David Harris
2e85b47c15
Update testbench/common/riscvassertions.sv
Co-authored-by: Jordan Carlin <jordanmcarlin@gmail.com>
2025-04-12 18:51:19 -07:00
David Harris
81a848246a Converting illegal instruction from 00000000 to FFFFFFFF; the zeros is a compressed instruction, and is messing with the trap handler. 2025-04-12 18:16:41 -07:00
David Harris
0a83488620 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2025-04-12 16:03:55 -07:00
David Harris
5bcc152e64 SVINVAL depends on VIRTMEM_SUPOPRTED 2025-04-11 17:51:35 -07:00
David Harris
521344b8b5 Fixed mstatus bits that should be read-only zero in certain configs (issue #1315) 2025-04-11 16:57:41 -07:00
David Harris
0528337a4a SUM and SPP are write only zeros if SATP and S are not supported 2025-04-11 16:21:05 -07:00
Jordan Carlin
c0274022fd
Merge pull request #1352 from davidharrishmc/dev
Decompressed and mmu coverage fixes
2025-04-11 09:45:20 -07:00
James Stine
ee01b0f23b minor typo in Python file 2025-04-11 10:32:47 -05:00
James Stine
e9a391f89e fix typo on comment 2025-04-11 10:18:50 -05:00
James Stine
e135d70569 Minor tweak + pre-commit stuff 2025-04-11 10:13:23 -05:00
James Stine
d7aed4b74e minor mods to README 2025-04-11 10:09:24 -05:00
James Stine
3dd698f031 Add Python program for Extended Euclidan Algorithm 2025-04-11 10:05:41 -05:00
James Stine
0e141e6229 Add Problem 18.5 exercise 2025-04-11 10:04:27 -05:00
David Harris
080011dab6 Partial immu pmp coverage 2025-04-11 07:23:37 -07:00
David Harris
3809b292c1 Decompressed and mmu coverage fixes 2025-04-11 06:42:20 -07:00
David Harris
2ad4f20900
Merge pull request #1351 from coreyqh/ccov
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Full csru code coverage
2025-04-09 11:05:35 -07:00