Chris Keilbart
|
2eeadb43d9
|
Preliminary OS support
|
2024-09-10 15:13:31 -07:00 |
|
Mike Thompson
|
f0b92a923a
|
Merge pull request #26 from CKeilbar/fpu-squashed
Add FPU (squashed)
|
2024-04-02 22:37:02 -04:00 |
|
Chris Keilbart
|
98f8be7d1e
|
Add FPU
|
2024-03-19 09:58:22 -07:00 |
|
Chris Keilbart
|
f3b1a453fb
|
Merge WSTRB fix
|
2024-03-19 09:53:31 -07:00 |
|
Chris Keilbart
|
a1ddc8506b
|
Switch from integer slice to width cast in fifo
|
2023-06-25 13:33:37 -07:00 |
|
Chris Keilbart
|
8a9d805a90
|
Linter fixes
|
2023-06-20 09:24:58 -07:00 |
|
Chris Keilbart
|
050ce7d650
|
Fix full signal for non power of 2 fifos
|
2023-06-19 10:49:29 -07:00 |
|
Chris Keilbart
|
a5e284bd43
|
Fix incorrect invalidation address
|
2023-06-19 10:48:23 -07:00 |
|
Mike Thompson
|
041d5c7809
|
Merge pull request #13 from e-matthews/code-cleanups
Code cleanups
|
2023-05-02 20:11:12 +00:00 |
|
Eric Matthews
|
8769842249
|
Add dcache cbo instruction support
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-05-02 14:58:26 -04:00 |
|
Eric Matthews
|
f11b9582e8
|
Autogenerate decode_wb_group from config data
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-05-01 16:42:41 -04:00 |
|
Eric Matthews
|
583976c7ea
|
Share nexys config between simulation and hardware wrapper
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-29 18:48:16 -04:00 |
|
Eric Matthews
|
31ecd190d6
|
Move write-back group config into cpu_config struct
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-29 18:37:42 -04:00 |
|
Eric Matthews
|
1d0ac14e70
|
Cleanup unit writeback group and ID assignment
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-28 19:51:18 -04:00 |
|
Eric Matthews
|
1085a86a04
|
Mul cleanup
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-28 19:47:16 -04:00 |
|
Eric Matthews
|
89810cec57
|
Decode/Issue cleanup
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-28 14:18:35 -04:00 |
|
Mike Thompson
|
ea96a5ccb2
|
Merge pull request #7 from flmeisel/axi_wstrb_fix
L2: Move be (i.e. wstrb for AXI) into the data FIFO (Fixes #6)
|
2023-04-18 13:24:13 -04:00 |
|
Eric Matthews
|
17c45f0050
|
Consolidate BRAM implementations
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-17 13:15:24 -04:00 |
|
Eric Matthews
|
24baf185e7
|
Convert remaining inferred lutram memories to lutram modules
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-14 23:06:22 -04:00 |
|
Eric Matthews
|
6b80905045
|
Reorganize source files
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-14 20:21:05 -04:00 |
|
Eric Matthews
|
a5b8088b10
|
CSR unit cleanups
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-14 15:42:46 -04:00 |
|
Eric Matthews
|
38d0336d9e
|
Move store-data-marshalling to retire
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-12 19:39:47 -04:00 |
|
Eric Matthews
|
9a188e39f9
|
Remove unused rtl files
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-11 19:45:27 -04:00 |
|
Eric Matthews
|
e003b51f95
|
Convert id_metadata from inferred LUTRAMs to LUTRAM modules
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-11 19:35:04 -04:00 |
|
Eric Matthews
|
6c63d2724e
|
Consolidate struct-to-bits type conversion into FIFO/LUTRAMs
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-11 14:43:39 -04:00 |
|
Eric Matthews
|
ffc2c21970
|
code cleanups
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-11 09:33:22 -04:00 |
|
Mike Thompson
|
e11f2e0864
|
Merge pull request #12 from e-matthews/nexys-script-improvements
Improvements for competition setup
|
2023-04-04 21:02:07 -04:00 |
|
Eric Matthews
|
85d3f36194
|
Robustness improvement to nexys system gen script
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-04-04 15:31:23 -04:00 |
|
Eric Matthews
|
5876454ab7
|
switch sim stats to use ISA rd for stall sources
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-27 12:57:52 -05:00 |
|
Eric Matthews
|
06331296a1
|
switch div unit to use ISA rs/rd for reuse
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-25 22:48:02 -05:00 |
|
Eric Matthews
|
b8ee58c515
|
cleanup naming of retire signals
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-25 14:58:07 -05:00 |
|
Eric Matthews
|
a2b7400b80
|
Add percentage breakdowns to simulation stats
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-25 14:52:02 -05:00 |
|
Mike Thompson
|
6a7eff1a1b
|
Merge pull request #9 from e-matthews/sq-fix
Fixes potential load/store ordering issue when store queue is full
|
2023-02-13 17:14:08 +01:00 |
|
Eric Matthews
|
f30416072d
|
Fixes potential load/store ordering issue when store queue is full
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-12 20:14:05 -05:00 |
|
Mike Thompson
|
efdf3fe38c
|
Merge pull request #8 from e-matthews/cva5-university-competition
CVA5 university competition branch
|
2023-02-10 04:43:17 +01:00 |
|
Eric Matthews
|
5ae06b1c64
|
Nexys system gen script improvements
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-08 21:26:42 -05:00 |
|
Eric Matthews
|
599a2a8517
|
Store Queue and Arbiter code cleanups
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-08 21:26:08 -05:00 |
|
Eric Matthews
|
79daaa9fd1
|
Remove phys_addr from issue/wb interface
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-03 16:31:23 -05:00 |
|
Eric Matthews
|
2bac02308f
|
Fix logic removal when forwarding to stores is disabled
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-02 20:02:08 -05:00 |
|
Eric Matthews
|
5ec6a61591
|
Remove load delay after dcache stores
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-02 20:01:26 -05:00 |
|
Eric Matthews
|
85645b7ef1
|
Combine ALU logic ops with STL path
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-01 23:09:18 -05:00 |
|
Eric Matthews
|
f15fe83a9c
|
Store queue data forwarding restructure
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-02-01 23:08:13 -05:00 |
|
Eric Matthews
|
4bada38942
|
Make forwarding-to-stores a config option
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-30 20:31:39 -05:00 |
|
Eric Matthews
|
ff8b3f3f46
|
code cleanups: ALU
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-30 20:15:45 -05:00 |
|
Eric Matthews
|
6cf0d84c3e
|
Move decode logic to respective units
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-30 19:42:30 -05:00 |
|
Eric Matthews
|
ac362d0b5b
|
Move instruction decode to units
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-26 16:34:38 -05:00 |
|
Eric Matthews
|
47358a901c
|
Add custom unit template
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-24 19:06:45 -05:00 |
|
Eric Matthews
|
0b104c6caa
|
Improved writeback port parameterization
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-23 17:25:20 -05:00 |
|
Eric Matthews
|
1e9343a91c
|
Restructure registerfile muxes
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-20 19:30:04 -05:00 |
|
Eric Matthews
|
2e77b891d5
|
Add a writeback port for the LS unit
Signed-off-by: Eric Matthews <ematthew@sfu.ca>
|
2023-01-20 12:53:56 -05:00 |
|