Michael Schaffner
49ed0fcc44
Bump axi_node version
2018-09-12 17:58:18 +02:00
Michael Schaffner
d521bb8c2f
Add missing tests (rv64um) to verilator runs
2018-09-12 17:58:09 +02:00
Michael Schaffner
fa3aab09d7
Fix Makefile
2018-09-12 17:57:54 +02:00
Michael Schaffner
2312dbf18a
Update submodules common_cells and axi_node
2018-09-12 17:57:07 +02:00
Michael Schaffner
90bdd53428
Update axi_node submodule, add axi submodule.
2018-09-12 17:56:56 +02:00
Michael Schaffner
d4e3b34827
Modify Makefile (clean target)
2018-09-12 17:56:47 +02:00
Michael Schaffner
553732dfa6
do case insensitive grepping when checking tests
2018-09-12 17:56:35 +02:00
Florian Zaruba
90619fd80b
Spread frontend to separate files
2018-09-11 18:35:36 +02:00
Florian Zaruba
0d0f2682b8
Split frontend modules to separate files
2018-09-11 18:34:25 +02:00
Florian Zaruba
a5fa90d870
Fix floating point load sign extension
2018-09-11 13:42:27 +02:00
Florian Zaruba
92f18e6550
Merge remote-tracking branch 'origin/ariane_next'
2018-09-11 11:53:53 +02:00
Michael Schaffner
dbd32f8836
fix bug in dm_csrs (reading empty fifo)
2018-09-11 11:52:40 +02:00
Florian Zaruba
5ff7ed4832
Fix Questa flow
2018-09-11 11:51:20 +02:00
Luis Vitorio Cargnini
183343b966
added the additional files into the yaml file.
...
Changes to be committed:
modified: src_files.yml
2018-09-10 14:18:20 -07:00
Luis Vitorio Cargnini
4b61ba9c98
added the Spread files, removing the modules from frontend.sv and placing each in its own file, this it is the frontend cleaned of the additional modules.
...
Changes to be committed:
modified: src/frontend.sv
2018-09-10 14:16:29 -07:00
Luis Vitorio Cargnini
c1775be398
Changes to be committed:
...
new file: src/bht.sv
new file: src/btb.sv
new file: src/instr_scan.sv
new file: src/ras.sv
2018-09-10 14:14:56 -07:00
Michael Schaffner
46c066f32d
Exchange lfsr with lfsr_8bit module from common_cells
2018-09-06 08:00:08 +02:00
Michael Schaffner
a53e37175e
fix unconnected cache miss signals in top level (performance counters)
2018-09-06 08:00:08 +02:00
msfschaffner
5c7aa67cc0
Merge bit enable for valid/dirty flags
...
Merge bit enable for valid/dirty flags
2018-09-05 12:15:16 +02:00
Florian Zaruba
dbd1cf657d
Merge pull request #91 from msfschaffner/ariane_next
...
FPGA specific improvements
2018-09-03 13:10:12 +02:00
Michael Schaffner
584e88b0c7
fix bug in dm_csrs (reading empty fifo)
2018-09-01 21:54:46 +02:00
Michael Schaffner
94a05ab090
add missing default state in case statement
2018-08-31 13:22:46 +02:00
Michael Schaffner
9fa86499c3
fix synthesis issue (latches, unreachable fsm states)
2018-08-31 13:10:56 +02:00
Michael Schaffner
768a175793
replace fetch fifo in frontend, switch to credit based flow control
2018-08-31 13:00:08 +02:00
Michael Schaffner
0d2803abc9
move cache-specific files to separate folder
2018-08-31 13:00:00 +02:00
Florian Zaruba
cad3334977
Merge pull request #89 from msfschaffner/ariane_next
2018-08-27 09:24:26 -07:00
Michael Schaffner
38a42055c1
change fifo module names to fifo_v2 to stay compatible with common_cells submodule
2018-08-27 15:04:39 +02:00
Florian Zaruba
4f18e7fca7
Fix issue #87 ( #88 )
2018-08-27 15:04:39 +02:00
Florian Zaruba
b2aec7d630
Fix issue #87 ( #88 )
2018-08-26 20:39:37 -07:00
Michael Schaffner
a6a1af9af8
revert sram wrapper interface and module name
2018-08-24 19:24:29 +02:00
Michael Schaffner
cca0d66fab
switch to common_cells repo, remove redundant files, cleanup + benderize
2018-08-24 16:22:49 +02:00
Michael Schaffner
4f7bd54065
add fpga-support submodule, exchange srams with inferrable blockrams, remove flat byte enables
...
switch icache to inferrable blockrams
exchange sram with regfile
switched sram to sram_wrapper in testharness
replace dirty/valid sram with regfile
replace behav_sram with fpga inferrable ram
remove flat byte enables
fix in makefile
add reset to valid regs
2018-08-24 12:23:50 +02:00
Michael Schaffner
5c5e37fc25
small byte enable fixes in dm
2018-08-24 12:23:50 +02:00
msfschaffner
61f9a60db6
Merge pull request #84 from pulp-platform/ariane_next
...
Merge ariane_next into master
2018-08-23 15:05:55 +02:00
Florian Zaruba
635de4bc62
Merge pull request #82 from msfschaffner/ariane_next
...
- Fix typos in clint
- Re-structure CI flow
- Fix #78
2018-08-22 10:04:55 -07:00
Michael Schaffner
5e7734559f
fix #78
2018-08-22 17:21:54 +02:00
Michael Schaffner
8e89f62181
⚡ restructure travis and gitlab-ci flow scripts and make targets
...
* fix typo in signal naming and make axi_adapter questa-sim compliant
2018-08-22 17:21:42 +02:00
msfschaffner
db77f10b37
Fix #78 ( #80 )
...
Fix #78
2018-08-22 07:38:36 -07:00
Florian Zaruba
238dbf8f04
Merge remote-tracking branch 'origin' into ariane_next
2018-08-21 20:22:31 -07:00
msfschaffner
8f0b388ecb
⚡ Cache hierarchy and LSU load unit optimizations
...
* ♻️ restructure hierarchy (move dcache out into ariane/std_cache_subsystem)
* update uvm-components submodule
* ♻️ switch to newer (and better) fifo implementation. redesign of lsu_arbiter to improve on timing.
* ♻️ restructure hierarchy (move dcache out into ariane/std_cache_subsystem)
* ♻️ move icache out to cache_subsystem. connect icache performance counter.
* ♻️ code cleanup
* ♻️ rewrote sign extension mux to decrease comb. delay
* provision additional logic for FLW, FLH, FLB in load_unit
* code cleanup, add efficient RR arbiter with lookahead capability
* change portnames in ariane_wrapped.sv for verilator TB
2018-08-18 11:03:09 -07:00
Florian Zaruba
38fb57ea68
Merge remote-tracking branch 'origin' into ariane_next
2018-08-14 08:52:21 -07:00
Florian Zaruba
fc6d7d2f82
Merge pull request #74 from pulp-platform/zarubaf-issue-72
...
Fix #72
2018-08-14 08:51:04 -07:00
Florian Zaruba
be927f77a9
Guard cover and asserts with `ifdef
2018-08-14 08:17:31 -07:00
Florian Zaruba
29d5be5716
Fix #72
...
Add cover directive and assertion on the cache interface.
2018-08-13 10:08:17 -07:00
Florian Zaruba
8b7d4bd61a
✨ Implement SBA business logic
2018-08-01 23:09:59 -07:00
Florian Zaruba
367bc46046
Add AXI Master module to SBA
2018-08-01 21:56:18 -07:00
Florian Zaruba
dc9442356c
♻️ Re-factor AXI master adapter
2018-08-01 21:43:49 -07:00
Florian Zaruba
e71da32bcc
Add SBA stub module
2018-08-01 21:34:20 -07:00
Florian Zaruba
9ed2a25dc1
✨ Add SBA CSRs to debug module
2018-08-01 21:20:40 -07:00
Florian Zaruba
5a2a86f333
🚨 Fix some verilator lint warnings
2018-08-01 20:25:15 -07:00
