Commit graph

  • 6e4ac43e1f
    multiplier.sv: improve code coverage (#2853) André Sintzoff 2025-03-21 14:59:34 +01:00
  • 035a01466e
    Fix c87b3e6ad (#2856) Guillaume Chauvon 2025-03-21 14:59:09 +01:00
  • 38f44dad7c
    csr_regfile.sv: use better signal name (CSR_MTVEC) (#2854) André Sintzoff 2025-03-21 14:56:44 +01:00
  • ebcb43a669
    To improve CC (#2855) JeanRochCoulon 2025-03-21 14:54:43 +01:00
  • 27548da2e7 serdiv.sv: use temporary signal to improve conditional coverage André Sintzoff 2025-03-21 14:29:49 +01:00
  • ca962c9681 To improve CC Jean-Roch Coulon 2025-03-21 14:10:37 +01:00
  • 9cc2af07d0 Fix c87b3e6ad Guillaume Chauvon 2025-03-21 11:58:50 +01:00
  • 20bd972e1d multiplier.sv: improve code coverage André Sintzoff 2025-03-21 14:02:37 +01:00
  • 5111611a71 csr_regfile.sv: use better signal name (CSR_MTVEC) André Sintzoff 2025-03-21 10:54:01 +01:00
  • 1342bc960b
    remove useless COMMA macro (#2850) Côme 2025-03-20 19:01:12 +01:00
  • 3ed0c0c610
    Merge branch 'master' into remove-comma-macro JeanRochCoulon 2025-03-20 17:44:12 +01:00
  • 75bc12d01b
    ci: fix pmp tests (#2851) Valentin Thomazic 2025-03-20 17:43:56 +01:00
  • c66bb825fd ci: fix pmp tests Valentin Thomazic 2025-03-20 15:02:54 +01:00
  • d35fc6be44
    Apply verible suggestion Côme 2025-03-20 15:28:08 +01:00
  • 48fcdc229d remove useless COMMA macro Côme Allart 2025-03-20 14:03:26 +01:00
  • 37424d0adb csr_regfile : condition RTL to improve code coverage Ayoub Jalali 2025-03-18 11:44:38 +01:00
  • 83203c1585
    Merge branch 'openhwgroup:master' into TraceInterface dassheladiya 2025-03-20 13:35:13 +01:00
  • a165a2bb50
    cv32a60x_config_pkg.sv: set NrPMPEntries to 0 (#2848) André Sintzoff 2025-03-20 12:23:22 +01:00
  • c87b3e6adc
    Various improvement for code coverage (#2846) Guillaume Chauvon 2025-03-20 12:19:01 +01:00
  • fac99d2ccf csr_regfile : condition RTL to improve code coverage Ayoub Jalali 2025-03-18 11:44:38 +01:00
  • c2f400276c
    Verible Guillaume Chauvon 2025-03-20 11:47:05 +01:00
  • 20f8c41d4a store_buffer: improve code coverage Guillaume Chauvon 2025-03-19 12:01:49 +01:00
  • c52ea06e5b Remove CVXIF RAW: register and issue interface are not split so it is useless Guillaume Chauvon 2025-03-18 17:55:52 +01:00
  • d343387160 decoder.sv: improve code coverage Guillaume Chauvon 2025-03-18 15:04:56 +01:00
  • bf9b756323 cv32a60x_config_pkg.sv: set NrPMPEntries to 0 André Sintzoff 2025-03-20 10:07:57 +01:00
  • 5400677651
    Merge branch 'master' into rt/rnm Riccardo Tedeschi 2025-03-20 09:29:37 +01:00
  • b258d27816
    [CVXIF] Initialize exception fields for RVH (#2844) Guillaume Chauvon 2025-03-19 17:31:29 +01:00
  • a164ec857d
    Merge branch 'master' into dev/fix-cvxif_fu_hypervisor_ex JeanRochCoulon 2025-03-19 17:29:34 +01:00
  • dc7e8cd158
    Merge branch 'master' into rt/rnm Riccardo Tedeschi 2025-03-19 17:13:51 +01:00
  • 79c7c2c681
    docs: add HTML generation for cv32a60x (followup PR2838) (#2845) André Sintzoff 2025-03-19 12:00:13 +01:00
  • bb8023ae8c
    Merge branch 'master' into doc-isa-60x JeanRochCoulon 2025-03-19 11:59:24 +01:00
  • 42eea3fe38
    Fix cv32a60x thales ci badge (#2843) Valentin Thomazic 2025-03-19 11:59:01 +01:00
  • 7fa2670fa8
    Merge branch 'master' into dev/fix-cvxif_fu_hypervisor_ex Guillaume Chauvon 2025-03-19 11:55:48 +01:00
  • d233827800
    verible Guillaume Chauvon 2025-03-19 11:45:01 +01:00
  • 761acab05d
    Fix cv32a60x thales ci badge Valentin Thomazic 2025-03-19 11:22:22 +01:00
  • 811ea7a2ee
    push reports to cv32a60x pipelines when applicable (#2842) Valentin Thomazic 2025-03-19 11:14:58 +01:00
  • d94db10fb1
    Minor dashboard-related adjustement (#2841) Valentin Thomazic 2025-03-19 11:14:10 +01:00
  • fede5326c1
    Merge branch 'master' into dashboardNotifWait JeanRochCoulon 2025-03-19 11:13:35 +01:00
  • 6b181370b2 docs: add HTML generation for cv32a60x (followup PR2838) André Sintzoff 2025-03-19 10:35:44 +01:00
  • 21506e4c66
    docs: add CV32A60X configuration in RISC-V ISA manual (#2838) André Sintzoff 2025-03-19 00:03:00 +01:00
  • 57407337c9
    Merge branch 'master' into doc-isa-60x JeanRochCoulon 2025-03-19 00:01:56 +01:00
  • 06cf5867d4 change dashboard gh workflow to give source branch Valentin Thomazic 2025-03-18 15:38:54 +01:00
  • dbdb4b75e6 cvxif_compressed_if_driver.sv: Improve code coverage Guillaume Chauvon 2025-03-18 14:27:07 +01:00
  • ffc442c42b cvxif_compressed_if_driver.sv: Improve code coverage Guillaume Chauvon 2025-03-18 14:27:07 +01:00
  • 22aac3dea1 change dashboard links Valentin Thomazic 2025-03-18 14:16:41 +01:00
  • e8509876fc wait before sending dashboard notif Valentin Thomazic 2025-03-18 14:13:29 +01:00
  • b7ca642dac Bump CVV (#2593, #2595). Zbigniew Chamski 2025-03-18 11:05:12 +01:00
  • e9e375f357 Bump CVV (#2593, #2595). Zbigniew Chamski 2025-03-18 11:05:12 +01:00
  • 22bbae2a17
    build(deps): bump core/cache_subsystem/hpdcache dependabot[bot] 2025-03-17 18:59:35 +00:00
  • 2201566fe9
    build(deps): bump verif/core-v-verif from 60e5724 to 39d40ef dependabot[bot] 2025-03-17 18:57:16 +00:00
  • b305b3a13e push to cv32a60x pipelines when applicable Valentin Thomazic 2025-03-17 17:57:32 +01:00
  • b38c259c8c
    Initialize compressed related signals in id_stage when RVC is disabled (#2833) Guillaume Chauvon 2025-03-17 17:35:43 +01:00
  • 7423dd69ea
    Verible Guillaume Chauvon 2025-03-17 16:40:50 +01:00
  • 2cf12e1451 Initialize compressed related signals in id_stage when RVC is disabled Guillaume Chauvon 2025-03-17 11:21:48 +01:00
  • 79ad41dc44 Improve CC Jean-Roch Coulon 2025-03-16 18:43:09 +01:00
  • 72cd079693 [CVXIF] Initialize exception fields for RVH Guillaume Chauvon 2025-03-17 10:23:15 +01:00
  • 3b21ba4954 Improve CC Jean-Roch Coulon 2025-03-16 18:43:09 +01:00
  • 931152d205
    FIx uvm seed for regression tests (light tests) (#2828) Jalali 2025-03-14 21:43:12 +00:00
  • 0e2e5128b2
    Assign a default value to tinst in decoder (#2830) Katharina 2025-03-14 22:42:29 +01:00
  • 470236832e
    Merge branch 'master' into master JeanRochCoulon 2025-03-14 22:41:42 +01:00
  • 2b1f45cad9
    Update CODEOWNERS with jbalkind and cfuguet (#2829) Jonathan Balkind 2025-03-14 14:39:36 -07:00
  • 9b55ab8189 Assign a default value to tinst in decoder Katharina Ceesay-Seitz 2025-03-14 11:38:05 +01:00
  • ae625fa449
    Merge branch 'master' into rt/rnm Riccardo Tedeschi 2025-03-13 18:03:55 +01:00
  • c1185aaa49
    Update CODEOWNERS with jbalkind and cfuguet Jonathan Balkind 2025-03-13 09:40:08 -07:00
  • 8631a565cb FIx uvm seed for regression tests (light tests) Ayoub Jalali 2025-03-13 17:15:12 +01:00
  • 1ef6de2dd1 docs: add CV32A60X configuration in RISC-V ISA manual André Sintzoff 2025-03-13 14:19:40 +01:00
  • 6338435d8d
    Update core/cva6_rvfi_probes.sv dassheladiya 2025-03-13 09:52:52 +01:00
  • c9ddd7b4fb
    Update core/cva6_rvfi_probes.sv dassheladiya 2025-03-13 09:52:33 +01:00
  • 8eb85fd149
    Update core/cva6_rvfi_probes.sv dassheladiya 2025-03-13 09:49:40 +01:00
  • c2794df8e6
    [CV32A6*X] Disable Zifencei across the verification infrastructure. (#2822) Zbigniew Chamski 2025-03-13 06:12:47 +01:00
  • dcee5b9cbb
    Improve Code Coverage (#2826) JeanRochCoulon 2025-03-12 23:24:22 +01:00
  • 45e845d165
    ci: test PMP with CV32A60X (#2825) Valentin Thomazic 2025-03-12 23:21:10 +01:00
  • 848a4ad063
    Merge branch 'master' into pmp_tests JeanRochCoulon 2025-03-12 23:20:35 +01:00
  • 1e0bf14894 [CV-X-IF] Use Spike Yaml ISA to control the addition of CV-X-IF insns. Zbigniew Chamski 2025-02-13 17:09:31 +01:00
  • 9bdb41ecd5 move pmp tests to synthesis tests stage Valentin Thomazic 2025-03-12 17:09:14 +01:00
  • 372f7c84ec [CI scripts] Update reference values of benchmark performance. Zbigniew Chamski 2025-03-12 16:32:44 +01:00
  • 274b4d1c0b When resolved_branch_i.is_mispredict is 1, resolved_branch_i.valid is 1 (see branch_unit.sv). Simplify code to increase code coverage Jean-Roch Coulon 2025-03-12 16:12:54 +01:00
  • 12d26610cf fix pmp 60x tests Valentin Thomazic 2025-03-12 15:47:37 +01:00
  • 6f72c9e0db change pmp test file Valentin Thomazic 2025-03-12 15:40:13 +01:00
  • 302ad68f42 move pmp test file Valentin Thomazic 2025-03-12 15:39:34 +01:00
  • 74ce85f1ec add bosch file back Valentin Thomazic 2025-03-12 15:37:13 +01:00
  • 5e4533ba9a add all tests in pmp testlist Valentin Thomazic 2025-03-12 15:23:00 +01:00
  • 3a389af151
    added correct reset val (#2823) khandelwaltanuj 2025-03-12 15:19:15 +01:00
  • 851504e752 ci: Test PMP on cv32a60x Valentin Thomazic 2025-03-12 14:37:43 +01:00
  • a77974feb0 [CVV] Bump to use extension reset fix (CVV PR #2590). Zbigniew Chamski 2025-03-12 14:29:33 +01:00
  • 8618a282a3
    Merge branch 'master' into cv64a60ax_cfg khandelwaltanuj 2025-03-12 14:16:57 +01:00
  • c3fe25aeda
    PMP Verif Plan and tests (#2648) OlivierBetschi 2025-03-12 13:17:40 +01:00
  • 707b7630b8 Restore newline Olivier Betschi 2025-03-07 16:36:35 +01:00
  • 60aa2aa596 Remove pmp tests from gitlab CI Olivier Betschi 2025-03-07 16:19:54 +01:00
  • feb9818112 Update for formatting core/cva6_rvfi.sv OlivierBetschi 2025-03-06 14:33:13 +01:00
  • 725ed4a1d3 update RVFI interface to take modified pmpaddr as if it was read by software Olivier Betschi 2025-03-06 14:29:44 +01:00
  • 601941aeb5 Remove PMP tests using NAPOT from regression scripts Olivier Betschi 2025-01-17 10:29:05 +01:00
  • 139f8cd814 Use addresses inside DRAM section of spike Olivier Betschi 2025-01-17 08:31:54 +01:00
  • 431ba42a1e Add SPIKE_TANDEM option Olivier Betschi 2024-12-13 10:31:01 +01:00
  • 847f2fd8fc Remove uvm_test option and associated include in uvm package Olivier Betschi 2024-12-11 15:16:29 +01:00
  • db8ba18391 Update PMP tests Olivier Betschi 2024-12-11 15:10:04 +01:00
  • 00151de5e0 Rollback of uvm_test parameter : after more testing it is not necessary to switch to a different firmware test Olivier Betschi 2024-12-11 13:40:27 +01:00
  • f6b34b3394 Remove spike tandem setting for PMP tests as spike is not enabled Olivier Betschi 2024-12-11 13:34:47 +01:00
  • c79257b219 Only use even addresses for pmpaddr test Olivier Betschi 2024-12-11 13:33:27 +01:00
  • 0a4e517820 Add pmp_test into uvm package Olivier Betschi 2024-12-09 17:57:25 +01:00