stnolting
a092efae72
[changelog] cleanup old releases
2025-03-15 22:09:53 +01:00
stnolting
d8e786b155
🚀 preparing release v1.11.2
2025-03-15 21:38:47 +01:00
stnolting
ce176bf0a8
⚠️ rename SPI & TWI transfer functions ( #1207 )
Processor / processor simulation (push) Waiting to run
2025-03-14 23:46:21 +01:00
stnolting
0774018b19
[sw] rename SPI/TWI transfer functions
2025-03-14 22:44:45 +01:00
stnolting
25bf47060d
[lib] SPI, TWI: rename transfer functions
2025-03-14 22:42:41 +01:00
stnolting
4e38ba7243
🐛 Fix Zbb shift instructions ( #1206 )
Processor / processor simulation (push) Waiting to run
2025-03-14 22:15:38 +01:00
stnolting
2bc36e5158
[changelog] add v1.11.1.9
2025-03-14 17:57:59 +01:00
stnolting
003f396201
[package] update version ID
2025-03-14 17:51:00 +01:00
stnolting
53f148bfa5
🐛 [Zbb] fix non-fast shift operations
...
The iterative shift logic of the CLMUL instructions was permanently blocking other B shift instructions.
2025-03-14 17:50:47 +01:00
stnolting
330b00bcab
Add NUMA LiteX configuration ( #1204 )
Processor / processor simulation (push) Has been cancelled
2025-03-11 18:17:15 +01:00
Pepijn de Vos
2eab42f7fe
some fixes
2025-03-11 17:55:23 +01:00
Pepijn de Vos
1761a0c226
some fixes
2025-03-11 17:54:53 +01:00
Pepijn de Vos
2dc9002c4d
add numa config
2025-03-11 17:27:14 +01:00
stnolting
e9fe37f614
fix: increment location counter with heap size ( #1201 )
Processor / processor simulation (push) Has been cancelled
2025-03-09 18:55:15 +01:00
Berkay Dinç
379e0e9678
fix: increment location counter with heap size
2025-03-09 19:12:59 +03:00
stnolting
b02ccb68bc
[docs] minor edits
Documentation / SW Framework (push) Has been cancelled
Documentation / Datasheet (push) Has been cancelled
Documentation / Deploy to Releases and Pages (push) Has been cancelled
2025-03-09 07:44:16 +01:00
stnolting
a67db7cecf
[docs] fix pdf top logo
2025-03-09 07:44:08 +01:00
stnolting
fa0ea6904f
Fix: quote readlink to fix windows make check ( #1197 )
Processor / processor simulation (push) Has been cancelled
2025-03-05 21:15:58 +01:00
Rémi Marche
32d40b1607
Fix: quote readlink to fix windows make check
...
@readlink -f ${SHELL} means @readlink -f C:\Program Files\Git\usr\bin\sh.exe on windows, so we need to escape the path to account for the space
Signed-off-by: Rémi Marche <35939574+ecstrema@users.noreply.github.com>
2025-03-05 11:09:03 +01:00
stnolting
8ab1fecf68
rtl: processor_templates: enable Zicntr ISA extension on minimal templates ( #1196 )
Processor / processor simulation (push) Waiting to run
Documentation / SW Framework (push) Has been cancelled
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2025-03-04 22:50:49 +01:00
Henrik Brix Andersen
24ff7c64be
rtl: processor_templates: enable Zicntr ISA extension on minimal templates
...
Re-enable the Zicntr ISA extension on the neorv32_ProcessorTop_Minimal
and neorv32_ProcessorTop_MinimalBoot templates to restore RISC-V
compliance.
This allows for an easier path for evaluating 3rd party software
depending on Zicntr (e.g. the Zephyr RTOS).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-03-04 21:18:50 +00:00
stnolting
5753b32bd4
[top] fix reset output descriptions
2025-03-04 21:14:59 +01:00
stnolting
df230eeb56
[docs] minor edits
Documentation / SW Framework (push) Waiting to run
Documentation / Datasheet (push) Waiting to run
Documentation / Deploy to Releases and Pages (push) Blocked by required conditions
2025-03-03 20:13:32 +01:00
stnolting
449dd87766
⚠️ rework DMA and GPTMR ( #1194 )
Documentation / SW Framework (push) Has been cancelled
Documentation / Datasheet (push) Has been cancelled
Processor / processor simulation (push) Has been cancelled
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2025-03-02 15:31:59 +01:00
stnolting
00e7423a5a
[crc] minor edits
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make writing CRC data is 1 cycle faster
2025-03-02 09:55:38 +01:00
stnolting
5370c777ec
[sw/example] update DMA/GPTMR usage
2025-03-02 09:54:55 +01:00
stnolting
3650f4fb21
[sw/lib] CPU: minor cleanups
2025-03-02 09:54:23 +01:00
stnolting
4fd4dbff67
[top] cleanup
2025-03-02 09:54:09 +01:00
stnolting
ab814e598a
[changelog] add v1.11.1.8
2025-03-02 09:53:59 +01:00
stnolting
7b429b87d8
[package] update version ID
2025-03-02 09:51:36 +01:00
stnolting
4715507f62
[svd] update GPTMR and DMA
2025-03-02 09:51:24 +01:00
stnolting
35d0fefbf0
⚠️ [dma] remove firq-triggered auto mode
2025-03-02 09:51:12 +01:00
stnolting
ecb185b9b6
⚠️ [gptmr] remove mode bit
...
GPTMR is now always in "continuous" mode (interval timer)
2025-03-02 09:50:37 +01:00
stnolting
79832104c9
[.ci] ghdl: switch back to nightly
Processor / processor simulation (push) Waiting to run
2025-03-01 21:05:54 +01:00
stnolting
a47afe1366
[ghdl] test v5.0.0
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nighlty seems broken
2025-03-01 21:01:25 +01:00
stnolting
d28aa12357
minor rtl edits ( #1193 )
2025-03-01 20:19:06 +01:00
stnolting
f5a5e7efe0
[changelog] add v1.11.1.7
2025-03-01 17:02:23 +01:00
stnolting
1f12b16566
[front-end] minor edits
2025-03-01 16:59:04 +01:00
stnolting
ffe7185373
[rtl] use index_size_f for onstants only
...
as this might cause synthesis issues
2025-03-01 16:58:39 +01:00
stnolting
03fcee1e17
[vivado_ip] remove deicated JTAG interface group
2025-03-01 16:56:57 +01:00
stnolting
f2d2f6f0fa
[vivado_ip] disable AXI port by default
2025-03-01 16:56:18 +01:00
stnolting
3cd192ecd2
[rtl] minor comment fixes
Processor / processor simulation (push) Waiting to run
2025-03-01 06:45:38 +01:00
stnolting
00294c6c29
[sw/lib] uart: minor fix
Documentation / SW Framework (push) Has been cancelled
Documentation / Datasheet (push) Has been cancelled
Processor / processor simulation (push) Has been cancelled
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2025-02-23 18:16:58 +01:00
stnolting
44789a754d
[docs] update RISC-V specs
2025-02-23 18:16:31 +01:00
stnolting
9b83b79df1
[cpu] relocate CPU counters ( #1192 )
2025-02-23 18:12:21 +01:00
stnolting
7f6b609316
[cpu] add new counters module
2025-02-23 10:49:12 +01:00
stnolting
34b6ad4e7f
[changelog] add v1.11.1.6
2025-02-23 10:48:39 +01:00
stnolting
9a1d94db02
[rtl] package cleanups
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do not include packages when they are not actually used
2025-02-23 10:43:52 +01:00
stnolting
4e6d639e1d
[sw/lib] rework neorv32_cpu_hpm_get_num_counters
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check all possible HPMCNT CSRs
2025-02-23 10:38:19 +01:00
stnolting
2d5f469101
[rtl] add CPU counters RTL file
2025-02-23 10:37:07 +01:00
