45 commits

Author	SHA1	Message	Date
Olof Kindgren	bc74a9a1d7	Used named generate statements ... Unnamed generate statements are not recommended and some tools throw warnings or errors for these.	2023-11-16 21:38:10 +01:00
Katherine Watson	7a6d5d3fc9	Make serv_alu.v synthesizable with Vivado	2023-11-16 14:41:46 +01:00
uhit332	2e23b5313a	alu with support for W=4	2023-10-31 12:42:52 +01:00
Olof Kindgren	14262bfc30	Rewrite logic expression of alu bool operations	2021-05-15 23:07:55 +02:00
Olof Kindgren	548b7fbb41	remove redundant ALU control signal	2021-03-14 23:22:50 +01:00
Olof Kindgren	727bb40a87	Simplify control logic for bool ops	2021-03-14 00:12:29 +01:00
Olof Kindgren	9a0b0e877c	Move shifter to mem_if ... This allows reusing the data bus registers for shift amount	2021-02-06 23:24:23 +01:00
Olof Kindgren	f70b79fd8f	Combine lt and eq regs to cmp_r in serv_alu	2021-02-01 22:37:45 +01:00
Olof Kindgren	5e4181d204	Optimize shift operations	2021-01-18 22:46:51 +01:00
Olof Kindgren	0bc19ef13c	Clean up serv_alu interface	2021-01-06 22:02:13 +01:00
Olof Kindgren	c9f41b54e8	Optimize init signal	2020-12-22 22:13:57 +01:00
Olof Kindgren	44287ed244	Remove unused reset input from serv_alu	2020-11-10 15:16:19 +01:00
Olof Kindgren	f10cb89ae4	Fix double-defined result_lt wire	2020-09-29 14:12:57 +02:00
Olof Kindgren	88a1a43438	Refactor and Use ALU subtractor for comparisons	2020-08-13 23:37:11 +02:00
Olof Kindgren	707f63ae8c	Rename ser_shift to serv_shift for consistency	2020-05-26 22:48:40 +02:00
Olof Kindgren	9606e3503d	Inline shift_reg	2020-05-26 22:43:23 +02:00
Olof Kindgren	1d311edb7d	Make counter internal in serv_state	2020-04-15 10:29:50 +02:00
dh73	2a7596b51d	Declare variables/nets before referenced	2020-03-25 23:31:55 +01:00
Olof Kindgren	ea1936710e	Inline ser_lt	2020-02-19 13:15:18 +01:00
Olof Kindgren	afb7e641dd	Inline adders	2020-02-19 11:00:55 +01:00
Olof Kindgren	6067b0e684	Use one-hot encoding for ALU rd sel	2019-12-07 23:36:36 +01:00
Olof Kindgren	eb5d25ea1c	Move op_b mux to alu	2019-12-07 23:09:04 +01:00
Olof Kindgren	3179cfb107	Optimize alu eq_r and lt_r	2019-12-03 10:28:27 +01:00
Olof Kindgren	126937f16a	Rewrite RF and state machine ... Big patch, but would take more work to split it up	2019-09-26 23:09:22 +02:00
Olof Kindgren	31852f175d	Simplify alu_cmp_eq control logic	2019-07-23 12:10:38 +02:00
Olof Kindgren	af3b82f9ac	Optimize take_branch condition	2019-07-23 12:10:38 +02:00
Olof Kindgren	e107627e71	Reduce warnings	2019-06-24 15:22:08 +02:00
Olof Kindgren	bba836ad8c	Fix width mismatches to make code verilator clean	2019-03-25 20:57:13 +01:00
Olof Kindgren	6e91409990	Optimize alu eq check	2019-03-20 08:35:43 +01:00
Olof Kindgren	a550137453	Use bufreg for shifter	2019-03-20 08:35:43 +01:00
Olof Kindgren	f5a1590422	Remove duplicated adder+inverter	2019-01-10 18:15:20 +01:00
Olof Kindgren	e3e616903e	Optimize bool operations	2018-12-25 13:13:04 +01:00
Olof Kindgren	09bb05071e	Fix bugs and missing resets to pass formal	2018-12-11 22:05:32 +01:00
Olof Kindgren	1bbf8e3ce9	Synthesis fixes	2018-11-22 20:58:45 +01:00
Olof Kindgren	9df2a0060b	Use custom interconnect. Runs on hw	2018-11-21 13:15:33 +01:00
Olof Kindgren	f66f82a57a	Add explicit wire defs to ports	2018-11-17 21:30:03 +01:00
Olof Kindgren	cbbdaed112	slli, srli, add, sll, sltiu, slt, xor, srl, sra, or, and	2018-11-02 13:48:08 +01:00
Olof Kindgren	8409aa4c4b	lh, lw, lbu, lhu, sb, sh, slti	2018-11-01 22:51:51 +01:00
Olof Kindgren	c90920d9b2	bge, bltu, bgeu	2018-11-01 09:35:49 +01:00
Olof Kindgren	d4bbe17e78	jalr, blt	2018-10-31 14:51:28 +01:00
Olof Kindgren	d4b2697761	auipc, sub	2018-10-30 23:33:28 +01:00
Olof Kindgren	96b1906676	bne, srai	2018-10-30 22:41:05 +01:00
Olof Kindgren	66000a77f5	beq, sw	2018-10-28 23:54:04 +01:00
Olof Kindgren	c2030a95fd	jal, addi, lui, lb	2018-10-26 22:52:39 +02:00
Olof Kindgren	e10c41be8d	Initial commit	2018-10-23 23:45:41 +02:00