github-mirrors/cva5
1
0
Fork 0
mirror of https://github.com/openhwgroup/cva5.git synced 2025-04-20 03:57:18 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Commit graph

  • a4ac269e4c new priority encoder Eric Matthews 2021-04-04 12:42:25 -07:00
  • f0a735de29 Intel workaround Eric Matthews 2021-04-03 20:08:57 -07:00
  • 01a32d174b Intel inferrence changes Eric Matthews 2021-04-03 14:33:45 -07:00
  • a5d0eeeed9 added intel MLAB attributes Eric Matthews 2021-04-03 14:24:16 -07:00
  • 0ba05fefb4 removed unused file Eric Matthews 2021-04-03 14:18:34 -07:00
  • 29bb9de27f lsq interface split Eric Matthews 2021-04-03 14:12:48 -07:00
  • 0f2bf34f82 minor refactor Eric Matthews 2021-04-03 12:12:22 -07:00
  • 558f598d96 removed old files Eric Matthews 2021-04-03 11:58:38 -07:00
  • 678b6d2f08 package import refactor Eric Matthews 2021-04-03 11:54:53 -07:00
  • 392209db8b rst changes due to use of wb.ack Eric Matthews 2021-04-03 10:31:57 -07:00
  • b52840571b mul unit adjustments for verilator Eric Matthews 2021-03-29 18:51:25 -07:00
  • b942e31b4a code cleanup Eric Matthews 2021-03-29 11:34:58 -07:00
  • c0ceb18d5f simulation: visibility into architectural regfile Eric Matthews 2021-03-29 11:33:00 -07:00
  • 6a74960814 CSR ops: wait until oldest Eric Matthews 2021-03-29 11:28:40 -07:00
  • 40f5e808fb Div improvements Eric Matthews 2021-03-29 10:45:40 -07:00
  • 8cc7e217ee added ci.yml yuhuig 2021-02-15 11:23:25 -08:00
  • ab1b5e4fd8 added FIFO assertion for potential_push Eric Matthews 2021-01-11 16:55:07 -08:00
  • 943b8bbc6e added pause/resume behaviour to stat collection Eric Matthews 2020-12-02 14:55:05 -08:00
  • f80872e618 reduced usage of rd_addr table Eric Matthews 2020-11-08 17:29:18 -08:00
  • 57cbca4d5b sq minor fix Eric Matthews 2020-11-08 13:22:01 -08:00
  • e49d919cff minor refactor Eric Matthews 2020-11-07 16:20:04 -08:00
  • e875eecba2 renaming rework Eric Matthews 2020-11-06 19:18:33 -08:00
  • dfec0e0d46 restructured toggle memories Eric Matthews 2020-10-18 15:29:18 -07:00
  • 720245693c increased registerfile depth to 64 Eric Matthews 2020-10-01 19:54:44 -07:00
  • 0230489a13 Split store data buffers Eric Matthews 2020-09-29 20:15:28 -07:00
  • d466d42730 Added depth parameterization to toggle mem Eric Matthews 2020-09-29 19:04:45 -07:00
  • 85e4dbca83 moved reg bank select to issue stage Eric Matthews 2020-09-28 18:24:24 -07:00
  • 1b6db8c309 Writeback mux reorganization Eric Matthews 2020-09-24 22:32:03 -07:00
  • eb81cd42a1 CSR read separated from LS path Eric Matthews 2020-09-23 14:27:41 -07:00
  • af0563ccad addr hash typo fix Eric Matthews 2020-09-16 15:41:06 -07:00
  • 78155870c1 seperated load and store queues Eric Matthews 2020-09-16 15:33:24 -07:00
  • 19c7e419d3 system op decode changes Eric Matthews 2020-09-10 16:12:29 -07:00
  • 7348cce98a RAS changes for early branch correction Eric Matthews 2020-09-07 20:55:34 -07:00
  • 22bb15ed1f early branch aliasing correction support Eric Matthews 2020-09-07 20:16:11 -07:00
  • 73057f6ec5 new metric for no_id_stall Eric Matthews 2020-09-07 14:10:47 -07:00
  • a309d88e67 fetch mmu fault propagation Eric Matthews 2020-09-07 13:26:17 -07:00
  • d522444a7c TLB updates Eric Matthews 2020-08-27 17:00:11 -07:00
  • 279cadd709 added support to abort MMU requests Eric Matthews 2020-08-18 14:08:30 -07:00
  • 32c33d081a MMU updates Eric Matthews 2020-08-16 19:34:45 -07:00
  • a1b7fba5b4 MMU rewrite Eric Matthews 2020-08-15 21:25:21 -07:00
  • ffcc2ef7c6 TLB updates Eric Matthews 2020-08-15 11:02:55 -07:00
  • b150f3a627 Added write validation to MCAUSE Eric Matthews 2020-08-14 11:37:34 -07:00
  • 27cc812806 write support added to mcycle, minstret Eric Matthews 2020-08-13 18:27:47 -07:00
  • 8f7a23d986 Added support for additional CSRs Eric Matthews 2020-08-13 16:44:27 -07:00
  • 71e69c87f7 Fixed how tracer values are being dumped. Zavier Aguila 2020-08-19 22:44:28 +00:00
  • 23ee598df6 cleaning up repo stuartjh 2020-08-13 16:33:35 -04:00
  • cdc631f3f9 created new fault-tolerant Taiga branch stuartjh 2020-08-12 10:40:56 -07:00
  • cd80e73dd6 created new fault-tolerant Taiga branch stuartjh 2020-08-12 10:34:19 -07:00
  • 01700d108e Updated taiga.mak. Removed untested simulated DDR features. Zavier Aguila 2020-08-08 03:32:54 +00:00
  • 30d314c263 L/S exception rework Eric Matthews 2022-01-18 10:57:33 -08:00
  • 56c5b2bbf3 exception updates Eric Matthews 2022-01-15 21:41:26 -08:00
  • 279efe70a9 fence logic load-store-unit Eric Matthews 2022-01-07 18:57:55 -08:00
  • 4f955c67ac changed uses_rs/rd to positive expressions Eric Matthews 2021-12-16 16:47:39 -08:00
  • ce91f774c2 interrupt rewire Eric Matthews 2021-12-15 19:30:06 -08:00
  • 13524e35cb rewired exception_target Eric Matthews 2021-12-15 14:40:35 -08:00
  • f956386668 switch to simple-dual-port ram Eric Matthews 2021-12-03 16:27:48 -08:00
  • 3621626af9 linting fix Eric Matthews 2021-12-03 12:46:04 -08:00
  • d0aaf65378 removed unused files from compile order Yuhui Gao 2021-12-03 14:39:53 -08:00
  • e162484106 merged in FPU Yuhui Gao 2021-12-03 14:25:23 -08:00
  • 96c4d1ea35 store queue fowarding simplification Eric Matthews 2021-12-02 11:26:14 -08:00
  • 643f666a8b global control signals restructuring Eric Matthews 2021-11-27 15:56:40 -08:00
  • 1468591886 CSR write enable update Eric Matthews 2021-11-26 15:50:45 -08:00
  • 923938a139 rate limit retire stage when exception_pending Eric Matthews 2021-11-23 18:46:26 -08:00
  • 500202f9b4 added exception_unit_table Eric Matthews 2021-11-22 16:47:48 -08:00
  • b5ba43ea6d first stage of exception redesign Eric Matthews 2021-11-16 21:30:15 -08:00
  • 0991dfba7b register csr update Eric Matthews 2021-11-16 21:28:51 -08:00
  • 63f30b1586 added reset param to lfsr Eric Matthews 2021-11-16 14:47:37 -08:00
  • e4259d0005 typo fixed Eric Matthews 2021-11-16 14:34:48 -08:00
  • 4ec4d8c373 use lutram and lfsr for FIFO Eric Matthews 2021-11-16 14:34:27 -08:00
  • 8aeafe5f8d removed old lut_ram Eric Matthews 2021-11-16 10:31:59 -08:00
  • 70048c07bd switch spec_table to 1w_mr lutram Eric Matthews 2021-11-15 21:35:13 -08:00
  • 4e59010807 switched toggle-mem to new lutram blocks Eric Matthews 2021-11-15 21:01:43 -08:00
  • 40d460905c new lutram components Eric Matthews 2021-11-15 21:01:23 -08:00
  • 28ceb72882 updated vendor selection config Eric Matthews 2021-11-15 14:08:04 -08:00
  • 864e27e9e8 added registerfile bypass Eric Matthews 2021-11-15 14:02:49 -08:00
  • a785445839 toggle memory updates Eric Matthews 2021-11-15 14:02:21 -08:00
  • 9125a0ea8b replaced shift counters for clear/flush logic Eric Matthews 2021-11-09 22:16:12 -08:00
  • c73ccf61c9 init/clear counters changed to un-ordered Eric Matthews 2021-11-09 20:48:05 -08:00
  • 20cd6ae965 delay retire by one cycle Eric Matthews 2021-11-03 14:01:04 -07:00
  • 6c36acecb2 CSR unit separated from exception logic Eric Matthews 2021-11-01 13:55:20 -07:00
  • acec40e52d prep for CSR split Eric Matthews 2021-10-28 10:55:51 -07:00
  • 719bee2d82 precompute store_queue full Eric Matthews 2021-10-27 17:13:22 -07:00
  • 8821e2f658 moved CSR legal addr checking Eric Matthews 2021-10-27 16:02:33 -07:00
  • c8121c5f79 resolved enum conflicts Eric Matthews 2021-10-27 16:01:21 -07:00
  • 62ce33642f div control signal cleanups Eric Matthews 2021-10-26 19:57:28 -07:00
  • 2b547bc0d5 CSR/GC restructuring Eric Matthews 2021-10-26 10:37:40 -07:00
  • e56790a442 CSR input cleanup Eric Matthews 2021-10-22 20:33:55 -07:00
  • ec62fe6e0c mcycle minstret behaviour change Eric Matthews 2021-10-22 17:05:59 -07:00
  • 82e3642fa2 minor const alu changes Eric Matthews 2021-10-08 16:24:43 -07:00
  • 99e9eb074f tool compatability changes Eric Matthews 2021-10-07 17:11:11 -07:00
  • c048f96f29 minor changes Eric Matthews 2021-10-07 09:17:22 -07:00
  • 14075c8f13 re-parameterization Eric Matthews 2021-07-16 15:46:07 -07:00
  • 2a77a76132 verilator cleanups Eric Matthews 2021-06-04 16:50:23 -07:00
  • 1f53bae6dc decode and branch cleanup Eric Matthews 2021-06-03 18:52:10 -07:00
  • 8088adc178 alu and decode cleanup Eric Matthews 2021-06-03 13:36:16 -07:00
  • 7436631db2 CI script merge Yuhui Gao 2021-05-21 12:27:28 -07:00
  • 460f59af75 code cleanup Eric Matthews 2021-04-14 15:46:04 -07:00
  • 72688fb17a tool inferrence changes Eric Matthews 2021-04-13 12:30:15 -07:00
  • 54b31d074a retire logic clean up Eric Matthews 2021-04-06 16:12:12 -07:00
  • 123324351d minor code cleanup Eric Matthews 2021-04-06 11:44:21 -07:00