Commit graph

7318 commits

Author SHA1 Message Date
dependabot[bot]
5dceb0d57a
Bump core/cache_subsystem/hpdcache from 019e04f to 5dea9e0 (#1877) 2024-02-26 21:24:56 +01:00
Yannick Casamatta
1dec79464e
add csr in rvfi (#1833) 2024-02-24 00:10:23 +01:00
CoralieAllioux
68f952b44c
Update usage of riscv_instr_gen_tb_top as in other cores: adapt it in corev-dv to import cva6-dependent packages (#1862) 2024-02-23 23:28:10 +01:00
André Sintzoff
1474395869
decoder.sv: sfence.vma valid only if S mode supported (fix #1866) (#1869) 2024-02-23 23:10:40 +01:00
JeanRochCoulon
f332688fc0
Complete Design Document (#1865) 2024-02-23 23:09:11 +01:00
valentinThomazic
e2a5b80550
do not source smoke-tests in ci (#1868) 2024-02-23 18:06:20 +01:00
Jalali
514fb86738
Map AXI functional coverage to the HVP (#1867) 2024-02-23 18:04:58 +01:00
Jalali
9c4a3c37d6
Remove mcountinhibit from csr_test and UVM env (#1863) 2024-02-21 19:13:57 +01:00
André Sintzoff
71f57a38c2
csr_regfile.sv: no MENVCFG[H], MCOUNTEREN when no User mode (fix #1843) (#1861) 2024-02-21 18:16:35 +01:00
André Sintzoff
3cdc903a3a
csr_regfile.sv: mcountinhibit only when PERF_COUNTER_EN (fix #1844) (#1860) 2024-02-21 14:13:50 +01:00
dependabot[bot]
e70bcbd6e7
Bump core/cache_subsystem/hpdcache from 38b9318 to 019e04f (#1857) 2024-02-21 13:14:03 +01:00
dependabot[bot]
21deaa71dc
Bump verif/core-v-verif from 1955db4 to d466330 (#1858)
Bumps [verif/core-v-verif](https://github.com/openhwgroup/core-v-verif) from `1955db4` to `d466330`.
- [Release notes](https://github.com/openhwgroup/core-v-verif/releases)
- [Commits](1955db4ef7...d46633081b)

---
updated-dependencies:
- dependency-name: verif/core-v-verif
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
2024-02-21 11:17:10 +00:00
Luca Valente
c84f979a15
Enable reads on CSR_HPM_COUNTERx (#1824) 2024-02-21 09:44:51 +01:00
Jalali
5dd04829e3
ISA functional coverage : Add directed tests (#1855) 2024-02-21 09:31:54 +01:00
valentinThomazic
cedc21bb35
fixed Verilator detection by tests (#1854) 2024-02-20 19:30:40 +01:00
dependabot[bot]
a8c15ca366
Bump verif/core-v-verif from c7d2077 to 1955db4 (#1852) 2024-02-20 12:08:05 +01:00
CoralieAllioux
965fd914b2
Bugfix/riscv dv cyclic dependency (#1853) 2024-02-20 12:07:21 +01:00
Cesar Fuguet
5de7c6003a
hpdcache: bump new version of the submodule (#1845) 2024-02-19 18:17:40 +01:00
AEzzejjari
5e80c104c9
AXI agent: Connect the the new AXI agent (#1817) 2024-02-18 23:31:44 +01:00
Cesar Fuguet
45ffb59980
fix: support of AMOs in cv32 configurations (#1841) 2024-02-18 23:30:41 +01:00
Jalali
3d7e417bce
Functional coverage : Add cross to illegal and exception coverage models (#1839) 2024-02-18 23:30:11 +01:00
JeanRochCoulon
b4c287a18e
Design Document, add ID_STAGE description (#1832) 2024-02-16 16:17:46 +01:00
Jalali
33a7a8207a
GEN_TESTS: Add --priv option to command generated tests (#1831) 2024-02-14 10:39:01 +01:00
Cesar Fuguet
00c0ff083a
hpdcache: bump new version of the submodule (#1830) 2024-02-13 18:19:16 +01:00
MarioOpenHWGroup
c7f0eaf0d8
Bump verif/core-v-verif from fd68dfd to c7d2077 (#1828) 2024-02-13 14:20:21 +01:00
Zbigniew Chamski
d48c4b5b4e
Fix waveform generation using vcs-uvm. Add waveforms section to README. (#1827) 2024-02-13 12:08:18 +01:00
Jalali
3599839d2e
Functional coverage : Fix illegal cover_group sampling (#1825) 2024-02-12 16:16:38 +01:00
JeanRochCoulon
0f2b137984
Populate instruction chapter in CV32A65X Design Document (#1820) 2024-02-12 09:58:02 +01:00
Nils Wistoff
6e8e2652b8
miss_handler: Fix AMO AXI ID mapping (#1821) 2024-02-09 23:14:47 +01:00
Jalali
5a9e1efd18
CVA6 HVP : MAP Illegal and exception covergroup into hvp (#1819) 2024-02-09 15:40:05 +01:00
Nils Wistoff
f5d5becfdd
cva6_config: Add ZiCondExtEn localparam in v configs (#1801) 2024-02-09 13:47:20 +01:00
Jérôme Quévremont
ef3bb06fbf
Adding configuration-specific CSR doc (#1766) 2024-02-09 13:39:48 +01:00
Jalali
22e9173b84
Functional coverage : Create Unmapped instruction and exceptions coverage models (#1818) 2024-02-09 11:31:15 +01:00
JeanRochCoulon
3f8649ec7e
Table builder for specification (#1814) 2024-02-08 10:54:47 +01:00
dependabot[bot]
e46baf6944
Bump verif/core-v-verif from aa5fe84 to fd68dfd (#1813) 2024-02-07 10:54:46 +01:00
Jalali
877a07c368
CVA6 HVP : Map ZCB instructions & remove DRET instruction (#1812) 2024-02-06 23:38:46 +01:00
JeanRochCoulon
9d0c700f42
port_builder generates the table of ports (#1805) 2024-02-06 12:06:13 +01:00
dependabot[bot]
0883882c3b
Bump verif/core-v-verif from 79d03a5 to aa5fe84 (#1806) 2024-02-05 23:37:08 +01:00
CoralieAllioux
48ea9a1675
[Bugfix hpdcache] axi struct usage (#1802) 2024-02-05 18:51:44 +01:00
JeanRochCoulon
42b21b8034
Configure icache with 2 ways in cv32a65x (#1800)
set 2 ways of 2048 bytes
2024-02-01 16:47:05 +01:00
JeanRochCoulon
de5d0d7ed4
cv32a65x (#1799) 2024-02-01 13:11:45 +01:00
JeanRochCoulon
5378031681
Fix HPDCache to make it functional when ways=2 (#1744) 2024-01-30 21:50:12 +01:00
JeanRochCoulon
56f6216430
Run simulation for embedded configuration (#1798) 2024-01-30 11:06:54 +01:00
dependabot[bot]
ae3a1ead28
Bump verif/core-v-verif from f17b93a to 79d03a5 (#1797) 2024-01-29 22:46:26 +01:00
dependabot[bot]
1e78cc8e6e
Bump verif/core-v-verif from 752e67f to f17b93a (#1789)
Bumps [verif/core-v-verif](https://github.com/openhwgroup/core-v-verif) from `752e67f` to `f17b93a`.
- [Release notes](https://github.com/openhwgroup/core-v-verif/releases)
- [Commits](752e67f54c...f17b93a693)

---
updated-dependencies:
- dependency-name: verif/core-v-verif
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
2024-01-26 16:44:56 +00:00
Jalali
c2d9d4b283
MTVAL : Remove MTVAL CSR from CVA6 UVM environment (#1788) 2024-01-26 16:47:15 +01:00
Jalali
179084315f
ISACOV : Update seq Directed test, and remove failing tests from regression (#1787) 2024-01-26 15:02:31 +01:00
Jalali
dc633a282c
report_benchmark.py: Detecting "mcycle" without CSR pseudo-code (#1786) 2024-01-26 14:26:03 +01:00
Guillaume Chauvon
fa101fae7a
Parameterize TVAL to reduce size in embedded (#1784) 2024-01-25 15:47:06 +01:00
Guillaume Chauvon
13a4a092ab
Check that User mode is enable to set MPP to U-mode (fix #1756) (#1781) 2024-01-25 10:05:57 +01:00