129 commits

Author	SHA1	Message	Date
Pasquale Davide Schiavone	edf308df16	SolderPad Header	2017-08-03 15:12:13 +02:00
Pasquale Davide Schiavone	146ef10c9c	update headers	2017-07-27 13:23:30 +02:00
Pasquale Davide Schiavone	3b1d8943c3	fixed tracer	2017-07-13 11:00:31 +02:00
Pasquale Davide Schiavone	cb54f9dc01	update new int controller	2017-04-26 15:35:07 +02:00
Pasquale Davide Schiavone	fe8f4fdf8e	Update muldiv module	2017-03-08 12:41:36 +01:00
Pasquale Davide Schiavone	99ffbe37af	Implemented Div, Divu, Remu	2017-03-07 16:17:17 +01:00
Pasquale Davide Schiavone	3cffca4756	bought wooley multiplier	2017-03-06 11:42:46 +01:00
Pasquale Davide Schiavone	495a05c7f4	fixed jumps	2017-03-03 14:10:34 +01:00
Pasquale Davide Schiavone	af5903f76f	updates	2017-03-02 12:00:26 +01:00
Pasquale Davide Schiavone	c62fccd8fd	update ready controller	2017-02-28 11:40:00 +01:00
Pasquale Davide Schiavone	764871c051	Updated	2017-02-17 10:02:26 +01:00
Pasquale Davide Schiavone	3d7b832ca6	General updates and renaming	2017-02-16 19:07:17 +01:00
Pasquale Davide Schiavone	1c7464551b	added monitor for misaligned via assert	2017-01-31 15:23:50 +01:00
Pasquale Davide Schiavone	11f0e4556d	fixed ret and misaligned memory accesses	2017-01-18 16:25:31 +01:00
Markus Wegmann	946c31ab9a	Fix deadlock	2017-01-12 19:16:27 +01:00
Markus Wegmann	6510bd3b65	Improve config scripts to not use small IF as it is bigger	2017-01-10 10:14:17 +01:00
Markus Wegmann	c6f2cacb30	Fix wrong jump calculation in case of JALR	2017-01-09 22:21:40 +01:00
Markus Wegmann	57f81c0630	Reformat config scripts	2017-01-09 14:04:06 +01:00
Markus Wegmann	9bdec204dc	Remove jump target adder	2017-01-09 13:57:24 +01:00
Markus Wegmann	c6640e06e4	Try to remove register buffers	2017-01-09 10:59:11 +01:00
Markus Wegmann	23eda1d0f0	Patch python script	2017-01-08 11:29:05 +01:00
Markus Wegmann	cc4d434fb7	Remove pc_ex from port map (MERGE_ID_EX)	2017-01-07 16:47:52 +01:00
Markus Wegmann	909ad7d416	Fix default configuration	2017-01-07 16:33:14 +01:00
Markus Wegmann	021dfd6721	Merge ID and EX with MERGE_ID_EX	2017-01-07 14:33:33 +01:00
Markus Wegmann	69fc1a2e67	Begin to implement ID-EX merge	2017-01-07 11:52:03 +01:00
Markus Wegmann	42f73781d0	Add handling for NO_JUMP_ADDER in prefetcher	2017-01-07 10:49:56 +01:00
Markus Wegmann	05c4646c13	Fix syntax and add option to default config	2017-01-06 12:05:54 +01:00
Markus Wegmann	1ced4c5dca	Remove jump in id	2017-01-05 13:22:39 +01:00
Markus Wegmann	a696658a96	Set default littleRISCV setting to RV32E with misaligned access	2017-01-04 14:09:44 +01:00
Markus Wegmann	87c4f51f2a	Fix syntax in python script	2017-01-02 00:30:53 +01:00
Markus Wegmann	5794d5a68d	Add new testing capabilities to ri5cly-manage.py. Remove JUMP_IN_ID option from configs.	2017-01-02 00:23:14 +01:00
Markus Wegmann	346d14c5c8	Fix some issues and cleanup	2016-12-30 00:26:15 +01:00
Markus Wegmann	d13f0ab003	Rename hardware loop config region. Add sample configurations to script folder	2016-12-29 22:16:27 +01:00
Markus Wegmann	00a2c3a8fb	Create a clean code generation script for littleRISCV called ri5cly-manage.py	2016-12-29 21:41:59 +01:00
Markus Wegmann	04741447d1	Add RV32E option	2016-12-26 15:39:00 +01:00
Markus Wegmann	b9bdeea057	IF prefetcher new design progress	2016-12-19 23:27:02 +01:00
Markus Wegmann	d871d1a590	Implement 2r1w register file	2016-12-15 15:55:56 +01:00
Markus Wegmann	a0e0eb1d96	Add and implement option to remove adder in LSU	2016-12-14 15:04:42 +01:00
Markus Wegmann	0cc959be74	Rename two-port register file mode	2016-12-01 13:27:17 +01:00
Markus Wegmann	72d4f0e81f	Fix syntax to be configurable as full RI5CY	2016-11-28 18:12:11 +01:00
Markus Wegmann	9e92b24551	Merge RI5CY master	2016-11-22 11:14:36 +01:00
Markus Wegmann	bd48b97ffb	Fix syntax in riscv config	2016-10-20 22:19:39 +02:00
Markus Wegmann	64d80a79e1	Remove special math and bit operations	2016-10-20 22:06:52 +02:00
Markus Wegmann	5445d0a08e	Add simplified ALU	2016-10-20 17:17:59 +02:00
Markus Wegmann	942d5944f7	Remove Hardware Loop	2016-10-18 15:04:28 +02:00
Markus Wegmann	f5fc141ce4	Add switch for Vector support. Remove divider when multiplier removed.	2016-10-17 18:09:04 +02:00
Markus Wegmann	fbc5c074bc	Add RI32M support switch and apply it to all signals	2016-10-17 11:04:00 +02:00
Pasquale Davide Schiavone	c2a69926b3	Added clip, addsubnorm and bitman reg variant instructions	2016-10-12 09:02:47 +02:00
Pasquale Davide Schiavone	92ae281aab	Implemented beqimm and bneimm	2016-07-06 11:39:28 +02:00
Gautschi	55d66013ae	fixed issue with include file	2016-06-23 14:36:30 +02:00