Jalali
446defb900
CVXIF VSEQ: RD equal x10 for CUS_ADD_RS3_RTYPE ( #2682 )
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Fix cvxif vseq
2025-01-02 14:51:24 +01:00
Jalali
b4a037d33b
Interrupt cov : sample when rvfi.intr is asserted ( #2675 )
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2024-12-19 16:20:45 +01:00
Jalali
66ae110a51
CVXIF Verif : Connect CVXIF new agent ( #2663 )
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2024-12-11 18:29:02 +01:00
Jalali
5b1c194cb7
UVM_ENV : Clean up CVA6 UVM env ( #2633 )
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This MR do some cleaning on the uvm env :
* fixing typo
* remove unused code
* printing in the right place
2024-11-26 15:30:48 +01:00
AEzzejjari
2157aaa926
Accelerate the performance of the AXI agent ( #2631 )
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Accelerate the performance of the AXI agent by disabling all the randomization and sending responses with zero delay
2024-11-25 18:02:30 +01:00
Jalali
7eb33df0ac
Interrupt agent : Modify README also clean interrupt_pkg ( #2571 )
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2024-11-21 23:59:42 +01:00
AEzzejjari
6a8d1f422e
Integrating the new version of the AXI agent ( #2604 )
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Integrating the modifications to the AXI agent made by CEA
2024-11-20 18:55:15 +01:00
Jalali
7394941220
Interrupt verif : Implement clear mechanism in interrupt's agent ( #2527 )
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* INTERRUPT VERIF : Implement interrupt clear mechanism
* Interrupt Verif : Add irq_timeout to exit when we failed to write into irq_add
Also change uvm_warining to uvm_info
* Fix comment
2024-10-16 11:50:56 -04:00
Anouar
9c3aea232f
Performance tb ( #2543 )
2024-10-11 16:57:45 +02:00
Jean-Roch Coulon
e7f423404f
Set clock period at 20ns and fix vcs-uvm simulation time
2024-10-08 21:14:33 +02:00
Jalali
6a4af755aa
UVM environment: mcountinhibit doesn't raise an exception ( #2494 )
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fix in UVM environment after fixed RTL bug on mcountinhibit
(commit faf4536
2024-09-06 14:31:12 +02:00
AEzzejjari
d577aaf850
Fix vcs-uvm simulation flow ( #2485 )
2024-08-30 17:57:35 +02:00
AEzzejjari
668829de6e
Set the environment configuration only from env_cfg constraints. ( #2408 )
2024-08-29 18:00:32 +02:00
MarioOpenHWGroup
776e0137b6
[RVFI] Connect RVFI.intr to enable interrupts on TANDEM ( #2475 )
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* [RVFI] Connect rvfi
* Lower verbosity to uvme_axi_covg
* Add unified_traps as a param for yaml
* Apply suggestions from code review
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
---------
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
2024-08-29 11:33:42 +02:00
Côme
76e5b40961
fix single-step which was x in cv32a65x config and fix mcycle for double commit ( #2369 )
2024-08-22 12:03:20 +02:00
Jalali
9b576c1200
Configure uvm scoreboard to fix 64 issue ( #2440 )
2024-08-13 09:16:54 +02:00
xiaoweish
0c60bc6e3d
Add debug_test to cva6 ( #2339 )
2024-08-02 08:50:50 +02:00
Jalali
2e0a202440
Add check CSR counter in UVM scoreboard ( #2427 )
2024-08-02 00:20:47 +02:00
Guillaume Chauvon
81671e39fa
Fixes and Update CVXIF non regression tests, regression and TB ( #2424 )
2024-08-01 16:06:24 +02:00
Jalali
118f353f54
Exclude page fault exceptions if mmu isn't supported ( #2387 )
2024-07-23 19:40:49 +02:00
AEzzejjari
4b2b6e2983
Enable HPDcache in the UVM config ( #2379 )
2024-07-22 22:53:15 +02:00
Guillaume Chauvon
8fa590b5c3
CVXIF 1.0.0 ( #2340 )
2024-07-12 10:53:18 +02:00
Jalali
dc9dc150e7
Increase supported PMP entries in UVM testbench ( #2344 )
2024-07-10 11:54:29 +02:00
Jalali
2616d5e649
add UVM interrupt agent ( #2309 )
2024-07-05 11:54:34 +02:00
Jalali
702fedf23f
Fix issue #2479 #2468 ( #2318 )
2024-07-03 17:14:15 +02:00
Jalali
f18bac51b3
Bump CVV to fix issue 2484 ( #2302 )
2024-07-02 17:41:23 +02:00
xiaoweish
88f13c5874
Update uvml_mem use for core-v-verif's PR: 2480/2481/2482 ( #2295 )
2024-06-26 23:00:57 +02:00
Jalali
212c14e4b4
CSR verification : modify coverage based on new specification ( #2261 )
2024-06-14 14:01:23 +02:00
CoralieAllioux
28e94e5ce3
[Xcelium flow] Clean DPI void function import ( #2222 )
2024-06-12 09:45:33 +02:00
CoralieAllioux
367fe5850a
[Xcelium flow] corev dv yaml ( #2210 )
2024-06-12 09:44:44 +02:00
Jalali
feb35f2b88
Fix Csr instruction decode and change the message verbosity ( #2225 )
2024-06-10 13:22:05 +02:00
AEzzejjari
1c828c0a16
Connect the new AXI agent with CVA6 ( #2182 )
2024-06-03 14:42:37 +02:00
Jalali
ae4392e958
CORE-DV : Merge all exception handlers in one to optimize time simulation ( #2175 )
2024-05-31 12:39:58 +02:00
Jalali
9ddebe25ae
HOTFIX : ignore instr_addr_misaliged exception only when also there's a trap ( #2174 )
2024-05-31 12:39:48 +02:00
MarioOpenHWGroup
d714d833cb
Bump verif/core-v-verif from f7bda8e to NOTMERGED ( #2044 )
2024-05-30 15:57:58 +02:00
Jalali
c50c4770f5
TRAPS VERIF : Add checking pc after a trap and remove unnecessary coverage ( #2167 )
2024-05-30 09:02:24 +02:00
Jalali
7f31e76ac1
CSR REG PREDICTOR : Skip getting package on traps ( #2130 )
2024-05-23 18:13:44 +02:00
Jalali
1c6da9b739
Fix issue #2027 ( #2140 )
2024-05-22 11:01:53 +02:00
AEzzejjari
26d955d4d1
Set env_cfg directly from the CVA6 configuration. ( #2138 )
2024-05-21 12:32:24 +02:00
Jalali
137bd455a7
Functional coverage : Fix config values in sanity check ( #2134 )
2024-05-21 08:54:01 +02:00
AEzzejjari
3cd458d03c
Modify AXI assertion and coverage model for easy utilization of WT and HPDcache ( #2125 )
2024-05-17 22:34:36 +02:00
JeanRochCoulon
dd763b4f4c
Rename FpuEn into RVF ( #2109 )
2024-05-15 09:16:44 +02:00
Jalali
de29cfaaad
CSR coverage model : Remove covering S-mode fileds ( #2086 )
2024-04-30 17:02:22 +02:00
CoralieAllioux
82b2d15127
Add ifdef for VCS fix (UNSUPPORTED_WITH) ( #2041 )
2024-04-17 15:56:52 +02:00
CoralieAllioux
fb43d778b3
[UVM] Few LRM compliance fixes ( #2042 )
2024-04-15 16:44:34 +02:00
Jalali
bfff84eaeb
Fix issue #2018 ( #2023 )
2024-04-09 17:43:21 +02:00
JeanRochCoulon
4423feb06a
Rename ZiCondExtEn and FPGA_EN parameters ( #1992 )
2024-04-02 15:37:58 +02:00
Jalali
ea2ccffa78
Functional coverage : no need for cvxif directed tests ( #1969 )
2024-03-29 15:41:13 +01:00
CoralieAllioux
de2e254cd4
[Xcelium support] Remove void from DPI definition ( #1856 )
2024-03-22 17:07:06 +01:00
MarioOpenHWGroup
62bdf11594
Bump core-v-verif d94f0de and fix questa simulator ( #1915 )
2024-03-21 19:02:41 +01:00
