Commit graph

  • 983e670bc8
    Merge 52c2749a25 into 733743da0f Riccardo Tedeschi 2025-04-22 14:47:48 +02:00
  • 52c2749a25
    Merge branch 'master' into rt/rnm Riccardo Tedeschi 2025-04-22 14:47:46 +02:00
  • c970c7392f
    Merge c17d079702 into 733743da0f Lawrence Hunter 2025-04-22 11:29:22 +01:00
  • ee61d15569
    Merge 3203057211 into 733743da0f Eric Ackermann 2025-04-22 11:48:24 +02:00
  • 3203057211
    Fix cvxif_off_instr_n in issue_read_operands Eric Ackermann 2025-04-22 11:43:13 +02:00
  • 4fb39c4070
    Merge 19d73dc5d7 into 733743da0f Eric Ackermann 2025-04-22 09:41:26 +00:00
  • 19d73dc5d7
    List store instruction enums explicitly in fd_changes_rd_state Eric Ackermann 2025-04-22 11:41:24 +02:00
  • 0b08c5069a
    Merge 24e8c66ce2 into 733743da0f dependabot[bot] 2025-04-21 18:05:58 +00:00
  • 24e8c66ce2
    build(deps): bump core/cache_subsystem/hpdcache dependabot/submodules/core/cache_subsystem/hpdcache-abd2ffe dependabot[bot] 2025-04-21 18:05:55 +00:00
  • d9667c7192
    Merge 1c8dfc7a3e into 733743da0f dependabot[bot] 2025-04-21 17:58:08 +00:00
  • 1c8dfc7a3e
    build(deps): bump verif/core-v-verif from 60e5724 to 21da3b0 dependabot/submodules/verif/core-v-verif-21da3b0 dependabot[bot] 2025-04-21 17:58:06 +00:00
  • 78b219e6c4
    Merge 83203c1585 into 733743da0f dassheladiya 2025-04-21 02:59:18 +02:00
  • d227f39237
    Merge c801f8dd46 into 733743da0f Côme 2025-04-18 19:48:52 +00:00
  • c801f8dd46
    Update expected_synth.yml JeanRochCoulon 2025-04-18 21:48:49 +02:00
  • b7c01b0c05
    Merge b8a0f96fb5 into 733743da0f Cesar Fuguet 2025-04-18 15:41:17 +00:00
  • b8a0f96fb5 hpdcache: update submodule Cesar Fuguet 2025-04-18 17:41:10 +02:00
  • 10957a24fe hpdcache: update the submodule Cesar Fuguet 2025-04-18 15:47:57 +02:00
  • f728ca5cab
    Merge branch 'master' into waw-elimination JeanRochCoulon 2025-04-18 11:43:54 +02:00
  • c80f6b6d5e benchmarks: update expected values Côme Allart 2025-04-17 17:37:38 +02:00
  • d125a3f7f8 make renaming mandatory Côme Allart 2025-04-17 15:33:09 +02:00
  • 5af65267bc replace '1 by {N{1'b1}} Côme Allart 2025-04-17 13:39:52 +02:00
  • c318a88dfb fix rs1 & rs3 Côme Allart 2025-04-03 11:10:48 +02:00
  • f526728e05 enable renaming for FPGA boot Côme Allart 2025-03-11 16:12:37 +01:00
  • 26ca0c442b
    Merge d83789fa4f into 733743da0f MaxCThales 2025-04-17 13:12:49 +02:00
  • e6f3c5f3ff
    Merge 0de266db5b into 733743da0f Isaar Ahmad 2025-04-17 10:17:21 +00:00
  • 0de266db5b Formatting edits isaar-ahmad 2025-04-17 11:17:00 +01:00
  • 073efbe055 Incorporated feedback comments. isaar-ahmad 2025-04-09 00:10:26 +01:00
  • b3b1cb02f9 Simulate veri-testharness with RISC-V proxy kernel. Initially tested with cv64a6_imafdc_sv39 isaar-ahmad 2025-04-04 09:25:31 +01:00
  • 50d3daa8ef
    Merge f748adcf23 into 733743da0f Munail Waqar 2025-04-17 12:38:27 +05:00
  • abc4e97e3c
    Merge 6c8e09b5f1 into b1f80bd7cf Cairo Caplan 2025-04-16 23:19:03 +02:00
  • 6c8e09b5f1 docs: Review of the current cv32a60x documentation DO NOT MERGE Cairo Caplan 2025-04-16 23:05:09 +02:00
  • f9b6db641e
    Merge 7d828c8d16 into 733743da0f Nicolas Derumigny 2025-04-16 23:04:02 +02:00
  • 733743da0f
    Fix URLs to point to CV32A60X-specific files on RTDs. (#2938) master Mike Thompson 2025-04-16 17:00:33 -04:00
  • cdc11cca9b Fix URLs to point to CV32A60X-specific files on RTDs. mike 2025-04-16 15:26:03 -04:00
  • 7d828c8d16 lint(ptx): check verible on tlb, mmu and ptw Nicolas Derumigny 2025-04-16 17:33:32 +02:00
  • 40e4d04650
    Apply Formatting Suggestions Eric Ackermann 2025-04-16 17:22:36 +02:00
  • b1f80bd7cf
    Add back ICACHE/DCACHE CSRs, update Yaml+adocs. Fix design doc Makefile. (#2937) cv32a60x Zbigniew Chamski 2025-04-16 15:19:48 +02:00
  • 1346fb9808 lint(cva6_mmu): fix coding style Nicolas Derumigny 2025-04-15 18:51:39 +02:00
  • 126e2d1c09 Indicate dirty in mstatus.FS correctly Eric Ackermann 2025-04-16 13:15:52 +02:00
  • e70e0582de Add back ICACHE/DCACHE CSRs, update Yaml+adocs. Fix design doc Makefile. Zbigniew Chamski 2025-04-16 12:36:59 +02:00
  • 539fd23573 fix(ptw): do not throw an execption on G-intermediate translation of instr Nicolas Derumigny 2025-04-15 17:56:20 +02:00
  • 9c100098ba refactor+fix(MMU): fix wrong htval value from TLB in guest PF Nicolas Derumigny 2025-04-13 15:35:54 +02:00
  • 11a759725d fix(cva6_mmu): fix hgatp translation of stores Nicolas Derumigny 2025-04-09 20:34:34 +02:00
  • b46a7f2ce9
    docs: add missing link to RST 60x design doc (#2932) André Sintzoff 2025-04-15 11:59:01 +02:00
  • 054a9baa04
    Merge c0e68d14f9 into 30811d1e7e Jérôme Quévremont 2025-04-15 14:52:44 +05:00
  • de1c534964 docs: add missing link to RST 60x design doc André Sintzoff 2025-04-15 11:52:22 +02:00
  • 30811d1e7e
    docs: link to CV32A60X design documentation (#2931) André Sintzoff 2025-04-15 11:36:38 +02:00
  • 823d7bd092
    docs: generate HTML for 60x design doc (#2930) André Sintzoff 2025-04-15 11:35:15 +02:00
  • 9d70a65e46 docs: link to CV32A60X design documentation André Sintzoff 2025-04-15 11:28:27 +02:00
  • 8d393065a7 docs: generate HTML for 60x design doc André Sintzoff 2025-04-15 11:20:22 +02:00
  • 0999d3480d
    Generate cv32a60x design document (#2924) JeanRochCoulon 2025-04-15 09:42:16 +02:00
  • 8bcb14a2df
    CV32A60X ISA (#2922) Mike Thompson 2025-04-15 03:40:35 -04:00
  • 84b382744c Restore title for CV32A60X documentation mike 2025-04-14 17:36:32 -04:00
  • b77be24e98
    build(deps): bump core/cache_subsystem/hpdcache dependabot[bot] 2025-04-14 17:37:46 +00:00
  • c577d6f04a
    build(deps): bump verif/core-v-verif from 60e5724 to 6b99706 dependabot[bot] 2025-04-14 17:36:53 +00:00
  • c0e68d14f9
    Solve a remark about CV32A60X. Jérôme Quévremont 2025-04-14 19:20:55 +02:00
  • d83789fa4f Verible fix Maxime COLSON 2025-04-14 16:39:10 +02:00
  • e4a8ffb1f6
    Code coverage : exclude second instanciation (#2925) Jalali 2025-04-14 12:30:24 +00:00
  • f5b8c746f2
    Reinstate docs build for 07_cv32a60x (#2923) Mike Thompson 2025-04-14 07:53:35 -04:00
  • b7beb7695e Code coverage : exclude second instanciation Ayoub Jalali 2025-04-14 11:28:30 +02:00
  • 99596541fd removing iti_enable flag Maxime COLSON 2025-04-14 11:46:08 +02:00
  • 48f8de1352 Apply 1 suggestion(s) to 1 file(s) Colson Maxime 2025-04-11 09:45:44 +02:00
  • 0beb8314a0 Generate cv32a60x design document Jean-Roch Coulon 2025-04-04 23:55:00 +02:00
  • 01550a32cd adding iti_type for encoder Maxime COLSON 2025-04-14 10:58:37 +02:00
  • f3ea34ac64 fixing test Maxime COLSON 2025-04-14 08:50:50 +02:00
  • 7bd0bc7be0
    Merge branch 'openhwgroup:cv32a60x' into cv32a60x Mike Thompson 2025-04-13 21:27:41 -04:00
  • 596470cc74
    Merge branch 'openhwgroup:master' into master Mike Thompson 2025-04-13 21:22:06 -04:00
  • f7fae486ff
    Fix https://github.com/openhwgroup/cva6/issues/2912 (#2916) AngelaGonzalezMarino 2025-04-11 17:21:29 +02:00
  • 1f1ddbb3ce Remove ifdef and change tests Maxime COLSON 2025-04-11 16:55:47 +02:00
  • 33a66ee5b9
    Fix some TO_BE_COMPLETED IO description (#2918) JeanRochCoulon 2025-04-11 15:25:42 +02:00
  • 7aec80a86b Fix some TO_BE_COMPLETED IO description Jean-Roch Coulon 2025-04-10 23:54:11 +02:00
  • c17d079702
    Bump verilator version Lawrence Hunter 2025-04-08 15:01:54 +01:00
  • b4d57d1b17
    Add Xilinx 2018.2 caveat to README Lawrence Hunter 2025-04-08 14:48:26 +01:00
  • d866b2a086
    Remove hardcoded paths Lawrence Hunter 2025-04-08 14:46:41 +01:00
  • f5b7718555
    Fix https://github.com/openhwgroup/cva6/issues/2912 AngelaGonzalezMarino 2025-04-11 14:14:48 +02:00
  • cb27242e17
    Clean up irrelevant FIXME/TODO (#2915) Yannick Casamatta 2025-04-11 12:59:41 +02:00
  • eb733d3513 Clean up irrelevant FIXME/TODO Casamatta Yannick 2025-04-11 10:48:37 +02:00
  • 5355c76147
    OBI: fix prot default value according to standard, and drive all parity signals (#2913) Yannick Casamatta 2025-04-10 16:07:15 +02:00
  • a418a9fb0a OBI: fix prot default value according to standard, and drive all parity signals Casamatta Yannick 2025-04-10 10:02:50 +02:00
  • e6ab9e55b6
    Trying to find a better wording for HPDCache. Jérôme Quévremont 2025-04-09 19:23:23 +02:00
  • f29d6a8be1
    HPDCache wording Jérôme Quévremont 2025-04-09 19:17:42 +02:00
  • 51ccf6819c
    Update cva6_requirements_specification.rst Jérôme Quévremont 2025-04-09 19:14:27 +02:00
  • 809904a280 Add Vivado in a container manual Nazar Kazakov 2025-04-09 15:40:08 +01:00
  • a220a54942
    config_pkg.sv: fix typo (for doc rendering) (#2909) André Sintzoff 2025-04-09 15:34:06 +02:00
  • 0fa6e7f8a2 config_pkg.sv: fix typo (for doc rendering) André Sintzoff 2025-04-09 11:42:05 +02:00
  • f748adcf23 lint fixes munailwaqar 2025-03-06 20:22:30 +05:00
  • a5aaa01d53 cleanup munailwaqar 2025-03-03 15:05:06 +05:00
  • 0a1a9a3f80 format fix munailwaqar 2025-03-03 14:33:10 +05:00
  • 9a4bd5f1d4 seperate aes package munailwaqar 2025-03-03 14:22:08 +05:00
  • 0a541c578e documentation and format munailwaqar 2025-02-26 12:35:37 +05:00
  • 127233d2f8 hashing instructions added munailwaqar 2025-02-24 17:40:31 +05:00
  • 964f568043 rebase fixes munailwaqar 2025-02-19 15:36:30 +05:00
  • 16066da8d6 code optimization munailwaqar 2025-02-19 12:21:06 +05:00
  • 52caa85b8f added seperate aes unit munailwaqar 2025-02-19 11:29:23 +05:00
  • 0d44909e17 comments added munailwaqar 2025-02-12 10:26:46 +05:00
  • a68a3e92fa format fixes munailwaqar 2025-02-10 12:01:33 +05:00
  • 148fc6f923 reworked sbox munailwaqar 2025-02-10 11:22:43 +05:00
  • 03ecaa585e aesks1i added munailwaqar 2025-02-03 14:15:35 +05:00
  • fe2c22cf55 documentation added munailwaqar 2025-01-27 17:38:35 +05:00
  • ffce2fff31 zknd instructions added munailwaqar 2025-01-27 16:12:14 +05:00