412 commits

Author	SHA1	Message	Date
stnolting	a9d5549e14	[sim] minor testbench edits	2025-01-07 21:23:20 +01:00
stnolting	1c4312a6cf	[sim] update atomic ISA generic	2025-01-03 21:27:15 +01:00
stnolting	40688a305f	[sim] enable dual-core option	2024-12-31 12:07:24 +01:00
stnolting	c3bee7ec28	[sim] disable register file reset by default	2024-12-30 10:55:57 +01:00
stnolting	22384e1a80	⚠️ remove top's HART_ID generic ... MHARTID is hardwired to zero	2024-12-27 06:41:42 +01:00
stnolting	8d0d6e1c6d	[sim] adjust generics	2024-12-26 22:47:36 +01:00
stnolting	e9d30ab485	[top] rename regfile HW reset generic	2024-12-22 18:06:33 +01:00
stnolting	70c76d48ad	⚠️ [top] rename CPU tuning generics ... add "CPU_" prefix	2024-12-22 17:57:35 +01:00
stnolting	8cf48eb05c	[top] re-arrange generics	2024-12-22 08:55:38 +01:00
stnolting	3df2f4e91e	[sim] cleanup GHDL scripts	2024-12-21 09:03:59 +01:00
stnolting	9d13cc5e58	[sim] ghdl: only use files from rtl/core	2024-12-19 20:26:58 +01:00
stnolting	53871c62f1	[testbench] add TWD module	2024-12-14 21:29:12 +01:00
stnolting	9114f108c0	[sim] disable external memories by default	2024-12-12 23:14:45 +01:00
stnolting	00ae8250de	[sim] minor comment edit	2024-12-12 23:01:56 +01:00
stnolting	9dd036f931	[tb] add external memory init options	2024-12-12 22:47:44 +01:00
stnolting	ce6815ecbc	[sim] uart_rx: minor cleanup	2024-12-12 22:47:26 +01:00
stnolting	0827fe731d	[sim] xbus_memory: add HEX file init option ... no VHDL2008 required	2024-12-12 22:40:08 +01:00
stnolting	3ebe1169b4	[sim] xbus_gateway: add port enable generics	2024-12-12 22:39:34 +01:00
stnolting	4bc8809ea9	[sim] only analyze files from 'rtl' and 'sim' folders ... #1096	2024-12-08 11:23:04 +01:00
stnolting	248296efe7	Merge branch 'main' into main	2024-12-03 21:57:13 +01:00
stnolting	99f9331ffd	[top] add onewire fifo generic	2024-12-01 21:58:28 +01:00
Cayetano Santos	6207cebe11	[sim] simplify script: not necessary to include file list to compile ... let ghdl decide about compilation order, regardless of location of sources in project	2024-11-21 10:23:44 +01:00
stnolting	58e472cc2e	[sim] add vhdl08 standard to GHDL run command	2024-11-20 18:27:45 +01:00
Cayetano Santos	8c7e8e0c47	use vhdl 2008 standard in ghdl simulations	2024-11-19 10:27:21 +01:00
stnolting	ef762b2735	[sim] rework default testbench	2024-11-10 00:36:29 +01:00
stnolting	32bb4f7b0e	[sim] add xbus infrastructure	2024-11-09 23:51:21 +01:00
stnolting	aa083fffdb	[sim] rewrote sim UART RX	2024-11-09 23:51:02 +01:00
stnolting	1cde85b0f4	[sim] cleanup GHDL build scripts	2024-11-09 23:48:54 +01:00
stnolting	7c6abcdf13	[sim] cleanup testbench	2024-11-01 21:29:24 +01:00
stnolting	9644bce38a	[sim] adjust sub-script calling	2024-11-01 07:31:05 +01:00
stnolting	257d49c44a	[sim] remove VUnit testbench ... the "simple" TB is now the "default" TB	2024-11-01 07:22:47 +01:00
stnolting	039243923c	[vuint] fix incorrect number of test cases	2024-10-20 21:00:59 +02:00
stnolting	b14ea49ea1	⚠️ [top] rework OCD generics	2024-10-11 12:37:30 +02:00
stnolting	e545c44b5c	[sim] update PWM configuration	2024-10-06 19:38:49 +02:00
stnolting	1f7bc8ac3d	[sim/simple] minor cleanup	2024-10-03 22:09:18 +02:00
stnolting	9badddee75	[sim] update ISA generics	2024-10-03 19:52:55 +02:00
stnolting	68314864ba	[sim] update testbench generics	2024-09-30 22:59:44 +02:00
stnolting	0b5b0c7fbb	[sim] update renamed ISA generics	2024-09-29 13:33:57 +02:00
stnolting	8b2393b1c4	minor comment fixes	2024-09-29 00:23:02 +02:00
stnolting	e512a0de30	[sim] enable Zks ISA extensions in testbenches	2024-09-28 20:15:02 +02:00
stnolting	0a18dc3c0b	[sim] enable Zbkc extension in testbenches	2024-09-27 21:40:07 +02:00
stnolting	b1cc8b1aa7	[sim] enable Zbkb in testbenches	2024-09-27 11:06:56 +02:00
stnolting	0322f76c9d	[sim] add crypto ISA ext. generics	2024-09-25 00:17:54 +02:00
stnolting	8950cb7257	[sim} clean-up run.py	2024-08-09 13:18:15 +02:00
stnolting	14ef5396fb	[sim] use file lists for simple GHDL setup ... experimental!	2024-08-04 19:39:53 +02:00
stnolting	e2f87b4658	[processor_check] add malloc/heap test	2024-08-02 07:51:30 +02:00
stnolting	b394b00c78	cleanup READMEs	2024-07-20 13:54:16 +02:00
stnolting	7d75d8a341	[sim] add propagation delay to SPI-SDI lines	2024-07-20 12:40:44 +02:00
stnolting	ecc187597f	[sim] remove GPTMR capture input	2024-07-04 12:25:57 +02:00
stnolting	333542bd42	⚠️ [top] remove AMO_RVS_GRANULARITY generic	2024-07-03 21:14:10 +02:00