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  • 101987c502
         adding the marchid (#30) master mohammadshahidzade 2025-03-17 20:19:22 -07:00
  • d04ab9555a adding the marchid msa417 2025-03-17 18:21:30 -07:00
  • 4efa1e2d03
         Os fixes6 (#29) mohammadshahidzade 2025-03-11 16:06:16 -07:00
  • e12ba42d24 adding the ~inv_matches_stage1 back in but in another place msa417 2025-03-10 16:51:10 -07:00
  • 3dd7e7a217 replacing onehot with a new version msa417 2025-03-07 15:53:24 -08:00
  • 8e16111e91 moving the plic and clint script to the xilinx folder msa417 2025-03-07 14:49:23 -08:00
  • cdf15c27cb chanign the load store unit attribute depth to 1 msa417 2025-03-07 14:47:30 -08:00
  • 54d40956a3 modifing the axi to match the rest of the repo msa417 2025-03-07 14:45:50 -08:00
  • c6867af6bf gettign rid of the deadcode in the dcache and handeling the way logic better msa417 2025-03-07 14:44:16 -08:00
  • d03087d377 a todo list for the cpu msa417 2025-03-07 14:42:25 -08:00
  • 901009ad4c deleting the extra commented codes in teh dcach inv and arbiter msa417 2025-03-07 14:40:57 -08:00
  • fb2e807eb5 changing some comments in the ram units msa417 2025-03-07 14:37:46 -08:00
  • 364a558314 change some naming in the litex wrapper and fixing hte tlb depth msa417 2025-03-07 14:35:41 -08:00
  • 96faf76b0f first patch fixing some comments msa417 2025-03-07 14:34:31 -08:00
  • 867ed896a2 litex wrapper is updated msa417 2025-02-05 10:25:58 -08:00
  • 6dd0d3c145 plic and clint tcl for making the ip msa417 2025-02-03 10:27:53 -08:00
  • fbee789b85 Merge branch 'os-fixes6' of github.com:CKeilbar/ck-cva5 into os-fixes6 msa417 2025-01-31 11:14:03 -08:00
  • 3bd08f7802 fixing dcache ways bug msa417 2025-01-31 10:22:10 -08:00
  • 60399bfe09 Add Vivado example Chris Keilbart 2025-01-02 17:33:09 -08:00
  • c60027995d solving axi rmw problem plus the axi plic and clint connections msa417 2025-01-01 12:06:24 -08:00
  • 3574d97c78 Fix used before declared warnings Chris Keilbart 2024-12-20 16:09:17 -08:00
  • 6703b72a70 Clarify ignored unit includes Chris Keilbart 2024-12-18 11:57:37 -08:00
  • e346737195 Add init to TDP RAM Chris Keilbart 2024-12-18 11:56:34 -08:00
  • 0a9ccd476a halting immu on an early_branch_flush msa417 2024-12-16 11:43:13 -08:00
  • 9e35451803 Fixing outstanding write for 4 cores msa417 2024-12-11 14:23:06 -08:00
  • 00cdc90dfe Unify simulation toplevel Chris Keilbart 2024-12-03 09:59:32 -08:00
  • b1a32be683 Make lowest interrupt priority default Chris Keilbart 2024-11-29 19:08:54 -08:00
  • 0c79085a33 Fix multiple interrupt handling Chris Keilbart 2024-11-29 17:40:49 -08:00
  • 49fbd69335 Delete legacy sim mem Chris Keilbart 2024-11-26 10:47:07 -08:00
  • 4f4e2bd67c Tabs to spaces Chris Keilbart 2024-11-26 10:44:47 -08:00
  • 4643d5d7fb Remove legacy formal verification pieces Chris Keilbart 2024-11-26 10:42:45 -08:00
  • 7ce104f43c Remove legacy config flags Chris Keilbart 2024-11-26 10:34:38 -08:00
  • 319df9e342 Fix snooping cache collisions Chris Keilbart 2024-11-25 18:17:14 -08:00
  • eedd6b27ec Fix typo ii Rajnesh Joshi 2024-11-14 11:47:26 -08:00
  • 8d82604bbe typo fix Rajnesh Joshi 2024-11-14 11:42:37 -08:00
  • 23e165f344 Fix issue exception codes Chris Keilbart 2024-11-12 15:32:07 -08:00
  • 22de6833a1 Fix supervisor interrupts Chris Keilbart 2024-11-07 18:07:43 -08:00
  • ffac4f2484 Fix PLIC interrupt priority read indexing Chris Keilbart 2024-11-07 13:57:15 -08:00
  • 0cd4dafff2 Revert supervisor timer interrupt changes Chris Keilbart 2024-11-05 15:05:16 -08:00
  • 5bcb65ee55 Fix clint address decoding Chris Keilbart 2024-11-03 15:22:26 -08:00
  • 1fda22c2ed Cleanup litex wrapper and remove external stip Chris Keilbart 2024-11-02 16:28:09 -07:00
  • de93ad945f Create an array of interrupts Rajnesh Joshi 2024-11-01 18:28:33 -07:00
  • 5eb521a50c Minor snoopy dcache fixes Chris Keilbart 2024-11-01 16:11:35 -07:00
  • a392ddd82f Fix data cache load address peek Chris Keilbart 2024-11-01 15:21:27 -07:00
  • 65c480f6c6 Change | to & on a_wbe Rajnesh Joshi 2024-11-01 13:51:50 -07:00
  • 5032f1124e Add PLIC Chris Keilbart 2024-10-31 16:10:08 -07:00
  • 770a06588e Simplify CLINT AXI Chris Keilbart 2024-10-31 16:08:04 -07:00
  • 461ed9b686 Update compile order with clint Rajnesh Joshi 2024-10-31 12:58:21 -07:00
  • 8b17eadd8c Add snoopy dcache Chris Keilbart 2024-10-28 18:00:15 -07:00
  • cc96545edf Enforce AXI adapter ordering Chris Keilbart 2024-10-28 17:59:22 -07:00
  • 887278e3a2 Linter fixes Chris Keilbart 2024-10-28 16:55:43 -07:00
  • cbf91d1646 Revert dcache request length Chris Keilbart 2024-10-26 18:33:00 -07:00
  • 23359a37f7 Fix mtime in litex wrapper Rajnesh Joshi 2024-10-26 18:02:38 -07:00
  • a5dfe9baac Add variable CPU ID for multi-core setups Rajnesh Joshi 2024-10-26 17:17:56 -07:00
  • 3a4783beab Add multi-core configurability Rajnesh Joshi 2024-10-26 17:01:34 -07:00
  • f8fa328c95 Remove l1_to_wishbone from litex simulation, and add wishbone adapter memory interface to core Rajnesh Joshi 2024-10-26 15:11:17 -07:00
  • 9c864e8fa3 Add wishbone adapter interface to the litex_wrapper Rajnesh Joshi - School Laptop 2024-10-25 23:26:57 -07:00
  • 6f2b8b7c97 Track outstanding writes Chris Keilbart 2024-10-24 12:59:31 -07:00
  • 4b1caa754d New AXI software simulation Chris Keilbart 2024-10-24 11:38:39 -07:00
  • 967652d6d2 Fix file perms Chris Keilbart 2024-10-24 10:16:21 -07:00
  • 20a60b3c79 New memory interface Chris Keilbart 2024-10-23 13:34:38 -07:00
  • b93b9c5090 Revert explicit indexing for interface arrays Chris Keilbart 2024-10-23 13:14:15 -07:00
  • 95b1fa11d1 Change clint addressing Chris Keilbart 2024-10-21 14:12:13 -07:00
  • 9fab3cde83 Add RISC-V CLINT Chris Keilbart 2024-10-21 13:00:13 -07:00
  • fd597fe05c Remove unused amo alu signals Chris Keilbart 2024-10-21 11:05:14 -07:00
  • 84607e30cf Explicit indexing for interface arrays Chris Keilbart 2024-10-17 09:32:04 -07:00
  • 3a124ae292 Fix one hot mux assertion for branch predictor Chris Keilbart 2024-09-22 19:13:16 -07:00
  • 0d9f727dc8 Fetch FIFO and ID fix Chris Keilbart 2024-09-22 14:30:46 -07:00
  • 03d52f4458 Fix one hot mux assertion for branch predictor Chris Keilbart 2024-09-22 19:13:16 -07:00
  • 5dfcdcb9cb Fetch FIFO and ID fix Chris Keilbart 2024-09-22 14:30:46 -07:00
  • e8f35161b8 Fix local memory AMO Chris Keilbart 2024-09-11 13:10:33 -07:00
  • 60e0259d9d Fix local memory AMO Chris Keilbart 2024-09-11 13:10:33 -07:00
  • a0f6e3cc54 Remove broken legacy tests Chris Keilbart 2024-09-11 12:20:09 -07:00
  • 2eeadb43d9 Preliminary OS support Chris Keilbart 2024-09-10 15:13:31 -07:00
  • f5a5ee7406 Update readme Chris Keilbart 2024-09-10 15:10:43 -07:00
  • 528adc3986 Minor unused cleanups Chris Keilbart 2024-09-09 13:28:03 -07:00
  • 309f58ab31 Support fault exceptions for bad LS addresses Chris Keilbart 2024-09-06 16:23:01 -07:00
  • a3acecbabf Remove old dcache Chris Keilbart 2024-09-06 10:49:20 -07:00
  • 417812949c Change IEC to GC Chris Keilbart 2024-09-06 10:14:21 -07:00
  • 3644426863 Register fflags for frequency Chris Keilbart 2024-09-05 15:29:43 -07:00
  • fabfabf972 Decoding resource improvements Chris Keilbart 2024-09-05 14:30:08 -07:00
  • 8dd971def9 Fix minstret on exception Chris Keilbart 2024-09-05 12:52:35 -07:00
  • 82d5efe10f Fix nexys sim uart Chris Keilbart 2024-09-05 12:22:08 -07:00
  • 33a2546033 Fix sim for verilator Chris Keilbart 2024-09-05 12:19:51 -07:00
  • a9c351ba22 Use ohot amo muxes Chris Keilbart 2024-09-03 15:31:05 -07:00
  • 350dd56b1c Add FPU os support Chris Keilbart 2024-09-03 15:10:18 -07:00
  • f0a930bf89 Merge early_branch_flush fix from Mohammad Chris Keilbart 2024-08-30 14:53:20 -07:00
  • 252d2ee1f3 Merge litex wrapper changes from Mohammad Chris Keilbart 2024-08-30 13:59:28 -07:00
  • e9db3d993b Remove minimal litex config Chris Keilbart 2024-08-30 13:55:17 -07:00
  • b154c50c8a Fix sq exceptions Chris Keilbart 2024-08-19 12:12:58 -07:00
  • 0683871650 Fix ecall and ebreak tval Chris Keilbart 2024-08-16 12:47:57 -07:00
  • 724989156d Merge SQ id collisions Chris Keilbart 2024-08-16 10:12:33 -07:00
  • 9b589caba5 Fix sq id tracking Chris Keilbart 2024-08-16 10:02:42 -07:00
  • beacd43b0b Force LS ID collisions Chris Keilbart 2024-08-15 18:25:37 -07:00
  • 464a8641d6 Fix writeback exception suppress to x0 Chris Keilbart 2024-08-15 15:04:38 -07:00
  • 66fe5f7813 Suppress writeback exceptions Chris Keilbart 2024-08-15 11:01:38 -07:00
  • e3740f5e35 Fix CBO and unaligned store exceptions Chris Keilbart 2024-08-13 14:33:53 -07:00
  • e72c948cfa Fix mmu level two page check Chris Keilbart 2024-08-12 18:53:23 -07:00
  • 6618c0bec7 Fix writeback on store exceptions Chris Keilbart 2024-08-09 14:20:41 -07:00
  • 01fde601a0 Fix immu address corruption Chris Keilbart 2024-08-09 11:14:39 -07:00